FFmpeg  4.2.3
nvenc.c
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1 /*
2  * H.264/HEVC hardware encoding using nvidia nvenc
3  * Copyright (c) 2016 Timo Rothenpieler <timo@rothenpieler.org>
4  *
5  * This file is part of FFmpeg.
6  *
7  * FFmpeg is free software; you can redistribute it and/or
8  * modify it under the terms of the GNU Lesser General Public
9  * License as published by the Free Software Foundation; either
10  * version 2.1 of the License, or (at your option) any later version.
11  *
12  * FFmpeg is distributed in the hope that it will be useful,
13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15  * Lesser General Public License for more details.
16  *
17  * You should have received a copy of the GNU Lesser General Public
18  * License along with FFmpeg; if not, write to the Free Software
19  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
20  */
21 
22 #include "config.h"
23 
24 #include "nvenc.h"
25 
27 #include "libavutil/hwcontext.h"
28 #include "libavutil/cuda_check.h"
29 #include "libavutil/imgutils.h"
30 #include "libavutil/avassert.h"
31 #include "libavutil/mem.h"
32 #include "libavutil/pixdesc.h"
33 #include "internal.h"
34 
35 #define CHECK_CU(x) FF_CUDA_CHECK_DL(avctx, dl_fn->cuda_dl, x)
36 
37 #define NVENC_CAP 0x30
38 #define IS_CBR(rc) (rc == NV_ENC_PARAMS_RC_CBR || \
39  rc == NV_ENC_PARAMS_RC_CBR_LOWDELAY_HQ || \
40  rc == NV_ENC_PARAMS_RC_CBR_HQ)
41 
47  AV_PIX_FMT_P016, // Truncated to 10bits
48  AV_PIX_FMT_YUV444P16, // Truncated to 10bits
52 #if CONFIG_D3D11VA
54 #endif
56 };
57 
58 #define IS_10BIT(pix_fmt) (pix_fmt == AV_PIX_FMT_P010 || \
59  pix_fmt == AV_PIX_FMT_P016 || \
60  pix_fmt == AV_PIX_FMT_YUV444P16)
61 
62 #define IS_YUV444(pix_fmt) (pix_fmt == AV_PIX_FMT_YUV444P || \
63  pix_fmt == AV_PIX_FMT_YUV444P16)
64 
65 static const struct {
66  NVENCSTATUS nverr;
67  int averr;
68  const char *desc;
69 } nvenc_errors[] = {
70  { NV_ENC_SUCCESS, 0, "success" },
71  { NV_ENC_ERR_NO_ENCODE_DEVICE, AVERROR(ENOENT), "no encode device" },
72  { NV_ENC_ERR_UNSUPPORTED_DEVICE, AVERROR(ENOSYS), "unsupported device" },
73  { NV_ENC_ERR_INVALID_ENCODERDEVICE, AVERROR(EINVAL), "invalid encoder device" },
74  { NV_ENC_ERR_INVALID_DEVICE, AVERROR(EINVAL), "invalid device" },
75  { NV_ENC_ERR_DEVICE_NOT_EXIST, AVERROR(EIO), "device does not exist" },
76  { NV_ENC_ERR_INVALID_PTR, AVERROR(EFAULT), "invalid ptr" },
77  { NV_ENC_ERR_INVALID_EVENT, AVERROR(EINVAL), "invalid event" },
78  { NV_ENC_ERR_INVALID_PARAM, AVERROR(EINVAL), "invalid param" },
79  { NV_ENC_ERR_INVALID_CALL, AVERROR(EINVAL), "invalid call" },
80  { NV_ENC_ERR_OUT_OF_MEMORY, AVERROR(ENOMEM), "out of memory" },
81  { NV_ENC_ERR_ENCODER_NOT_INITIALIZED, AVERROR(EINVAL), "encoder not initialized" },
82  { NV_ENC_ERR_UNSUPPORTED_PARAM, AVERROR(ENOSYS), "unsupported param" },
83  { NV_ENC_ERR_LOCK_BUSY, AVERROR(EAGAIN), "lock busy" },
84  { NV_ENC_ERR_NOT_ENOUGH_BUFFER, AVERROR_BUFFER_TOO_SMALL, "not enough buffer"},
85  { NV_ENC_ERR_INVALID_VERSION, AVERROR(EINVAL), "invalid version" },
86  { NV_ENC_ERR_MAP_FAILED, AVERROR(EIO), "map failed" },
87  { NV_ENC_ERR_NEED_MORE_INPUT, AVERROR(EAGAIN), "need more input" },
88  { NV_ENC_ERR_ENCODER_BUSY, AVERROR(EAGAIN), "encoder busy" },
89  { NV_ENC_ERR_EVENT_NOT_REGISTERD, AVERROR(EBADF), "event not registered" },
90  { NV_ENC_ERR_GENERIC, AVERROR_UNKNOWN, "generic error" },
91  { NV_ENC_ERR_INCOMPATIBLE_CLIENT_KEY, AVERROR(EINVAL), "incompatible client key" },
92  { NV_ENC_ERR_UNIMPLEMENTED, AVERROR(ENOSYS), "unimplemented" },
93  { NV_ENC_ERR_RESOURCE_REGISTER_FAILED, AVERROR(EIO), "resource register failed" },
94  { NV_ENC_ERR_RESOURCE_NOT_REGISTERED, AVERROR(EBADF), "resource not registered" },
95  { NV_ENC_ERR_RESOURCE_NOT_MAPPED, AVERROR(EBADF), "resource not mapped" },
96 };
97 
98 static int nvenc_map_error(NVENCSTATUS err, const char **desc)
99 {
100  int i;
101  for (i = 0; i < FF_ARRAY_ELEMS(nvenc_errors); i++) {
102  if (nvenc_errors[i].nverr == err) {
103  if (desc)
104  *desc = nvenc_errors[i].desc;
105  return nvenc_errors[i].averr;
106  }
107  }
108  if (desc)
109  *desc = "unknown error";
110  return AVERROR_UNKNOWN;
111 }
112 
113 static int nvenc_print_error(void *log_ctx, NVENCSTATUS err,
114  const char *error_string)
115 {
116  const char *desc;
117  int ret;
118  ret = nvenc_map_error(err, &desc);
119  av_log(log_ctx, AV_LOG_ERROR, "%s: %s (%d)\n", error_string, desc, err);
120  return ret;
121 }
122 
124 {
125 #if NVENCAPI_CHECK_VERSION(9, 2)
126  const char *minver = "(unknown)";
127 #elif NVENCAPI_CHECK_VERSION(9, 1)
128 # if defined(_WIN32) || defined(__CYGWIN__)
129  const char *minver = "436.15";
130 # else
131  const char *minver = "435.21";
132 # endif
133 #elif NVENCAPI_CHECK_VERSION(9, 0)
134 # if defined(_WIN32) || defined(__CYGWIN__)
135  const char *minver = "418.81";
136 # else
137  const char *minver = "418.30";
138 # endif
139 #elif NVENCAPI_CHECK_VERSION(8, 2)
140 # if defined(_WIN32) || defined(__CYGWIN__)
141  const char *minver = "397.93";
142 # else
143  const char *minver = "396.24";
144 #endif
145 #elif NVENCAPI_CHECK_VERSION(8, 1)
146 # if defined(_WIN32) || defined(__CYGWIN__)
147  const char *minver = "390.77";
148 # else
149  const char *minver = "390.25";
150 # endif
151 #else
152 # if defined(_WIN32) || defined(__CYGWIN__)
153  const char *minver = "378.66";
154 # else
155  const char *minver = "378.13";
156 # endif
157 #endif
158  av_log(avctx, level, "The minimum required Nvidia driver for nvenc is %s or newer\n", minver);
159 }
160 
162 {
163  NvencContext *ctx = avctx->priv_data;
165  NVENCSTATUS err;
166  uint32_t nvenc_max_ver;
167  int ret;
168 
169  ret = cuda_load_functions(&dl_fn->cuda_dl, avctx);
170  if (ret < 0)
171  return ret;
172 
173  ret = nvenc_load_functions(&dl_fn->nvenc_dl, avctx);
174  if (ret < 0) {
176  return ret;
177  }
178 
179  err = dl_fn->nvenc_dl->NvEncodeAPIGetMaxSupportedVersion(&nvenc_max_ver);
180  if (err != NV_ENC_SUCCESS)
181  return nvenc_print_error(avctx, err, "Failed to query nvenc max version");
182 
183  av_log(avctx, AV_LOG_VERBOSE, "Loaded Nvenc version %d.%d\n", nvenc_max_ver >> 4, nvenc_max_ver & 0xf);
184 
185  if ((NVENCAPI_MAJOR_VERSION << 4 | NVENCAPI_MINOR_VERSION) > nvenc_max_ver) {
186  av_log(avctx, AV_LOG_ERROR, "Driver does not support the required nvenc API version. "
187  "Required: %d.%d Found: %d.%d\n",
188  NVENCAPI_MAJOR_VERSION, NVENCAPI_MINOR_VERSION,
189  nvenc_max_ver >> 4, nvenc_max_ver & 0xf);
191  return AVERROR(ENOSYS);
192  }
193 
194  dl_fn->nvenc_funcs.version = NV_ENCODE_API_FUNCTION_LIST_VER;
195 
196  err = dl_fn->nvenc_dl->NvEncodeAPICreateInstance(&dl_fn->nvenc_funcs);
197  if (err != NV_ENC_SUCCESS)
198  return nvenc_print_error(avctx, err, "Failed to create nvenc instance");
199 
200  av_log(avctx, AV_LOG_VERBOSE, "Nvenc initialized successfully\n");
201 
202  return 0;
203 }
204 
206 {
207  NvencContext *ctx = avctx->priv_data;
209 
210  if (ctx->d3d11_device)
211  return 0;
212 
213  return CHECK_CU(dl_fn->cuda_dl->cuCtxPushCurrent(ctx->cu_context));
214 }
215 
217 {
218  NvencContext *ctx = avctx->priv_data;
220  CUcontext dummy;
221 
222  if (ctx->d3d11_device)
223  return 0;
224 
225  return CHECK_CU(dl_fn->cuda_dl->cuCtxPopCurrent(&dummy));
226 }
227 
229 {
230  NV_ENC_OPEN_ENCODE_SESSION_EX_PARAMS params = { 0 };
231  NvencContext *ctx = avctx->priv_data;
232  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
233  NVENCSTATUS ret;
234 
235  params.version = NV_ENC_OPEN_ENCODE_SESSION_EX_PARAMS_VER;
236  params.apiVersion = NVENCAPI_VERSION;
237  if (ctx->d3d11_device) {
238  params.device = ctx->d3d11_device;
239  params.deviceType = NV_ENC_DEVICE_TYPE_DIRECTX;
240  } else {
241  params.device = ctx->cu_context;
242  params.deviceType = NV_ENC_DEVICE_TYPE_CUDA;
243  }
244 
245  ret = p_nvenc->nvEncOpenEncodeSessionEx(&params, &ctx->nvencoder);
246  if (ret != NV_ENC_SUCCESS) {
247  ctx->nvencoder = NULL;
248  return nvenc_print_error(avctx, ret, "OpenEncodeSessionEx failed");
249  }
250 
251  return 0;
252 }
253 
255 {
256  NvencContext *ctx = avctx->priv_data;
257  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
258  int i, ret, count = 0;
259  GUID *guids = NULL;
260 
261  ret = p_nvenc->nvEncGetEncodeGUIDCount(ctx->nvencoder, &count);
262 
263  if (ret != NV_ENC_SUCCESS || !count)
264  return AVERROR(ENOSYS);
265 
266  guids = av_malloc(count * sizeof(GUID));
267  if (!guids)
268  return AVERROR(ENOMEM);
269 
270  ret = p_nvenc->nvEncGetEncodeGUIDs(ctx->nvencoder, guids, count, &count);
271  if (ret != NV_ENC_SUCCESS) {
272  ret = AVERROR(ENOSYS);
273  goto fail;
274  }
275 
276  ret = AVERROR(ENOSYS);
277  for (i = 0; i < count; i++) {
278  if (!memcmp(&guids[i], &ctx->init_encode_params.encodeGUID, sizeof(*guids))) {
279  ret = 0;
280  break;
281  }
282  }
283 
284 fail:
285  av_free(guids);
286 
287  return ret;
288 }
289 
290 static int nvenc_check_cap(AVCodecContext *avctx, NV_ENC_CAPS cap)
291 {
292  NvencContext *ctx = avctx->priv_data;
293  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
294  NV_ENC_CAPS_PARAM params = { 0 };
295  int ret, val = 0;
296 
297  params.version = NV_ENC_CAPS_PARAM_VER;
298  params.capsToQuery = cap;
299 
300  ret = p_nvenc->nvEncGetEncodeCaps(ctx->nvencoder, ctx->init_encode_params.encodeGUID, &params, &val);
301 
302  if (ret == NV_ENC_SUCCESS)
303  return val;
304  return 0;
305 }
306 
308 {
309  NvencContext *ctx = avctx->priv_data;
310  int ret;
311 
312  ret = nvenc_check_codec_support(avctx);
313  if (ret < 0) {
314  av_log(avctx, AV_LOG_VERBOSE, "Codec not supported\n");
315  return ret;
316  }
317 
318  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_YUV444_ENCODE);
319  if (IS_YUV444(ctx->data_pix_fmt) && ret <= 0) {
320  av_log(avctx, AV_LOG_VERBOSE, "YUV444P not supported\n");
321  return AVERROR(ENOSYS);
322  }
323 
324  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_LOSSLESS_ENCODE);
325  if (ctx->preset >= PRESET_LOSSLESS_DEFAULT && ret <= 0) {
326  av_log(avctx, AV_LOG_VERBOSE, "Lossless encoding not supported\n");
327  return AVERROR(ENOSYS);
328  }
329 
330  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_WIDTH_MAX);
331  if (ret < avctx->width) {
332  av_log(avctx, AV_LOG_VERBOSE, "Width %d exceeds %d\n",
333  avctx->width, ret);
334  return AVERROR(ENOSYS);
335  }
336 
337  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_HEIGHT_MAX);
338  if (ret < avctx->height) {
339  av_log(avctx, AV_LOG_VERBOSE, "Height %d exceeds %d\n",
340  avctx->height, ret);
341  return AVERROR(ENOSYS);
342  }
343 
344  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_NUM_MAX_BFRAMES);
345  if (ret < avctx->max_b_frames) {
346  av_log(avctx, AV_LOG_VERBOSE, "Max B-frames %d exceed %d\n",
347  avctx->max_b_frames, ret);
348 
349  return AVERROR(ENOSYS);
350  }
351 
352  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_FIELD_ENCODING);
353  if (ret < 1 && avctx->flags & AV_CODEC_FLAG_INTERLACED_DCT) {
354  av_log(avctx, AV_LOG_VERBOSE,
355  "Interlaced encoding is not supported. Supported level: %d\n",
356  ret);
357  return AVERROR(ENOSYS);
358  }
359 
360  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_10BIT_ENCODE);
361  if (IS_10BIT(ctx->data_pix_fmt) && ret <= 0) {
362  av_log(avctx, AV_LOG_VERBOSE, "10 bit encode not supported\n");
363  return AVERROR(ENOSYS);
364  }
365 
366  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_LOOKAHEAD);
367  if (ctx->rc_lookahead > 0 && ret <= 0) {
368  av_log(avctx, AV_LOG_VERBOSE, "RC lookahead not supported\n");
369  return AVERROR(ENOSYS);
370  }
371 
372  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_TEMPORAL_AQ);
373  if (ctx->temporal_aq > 0 && ret <= 0) {
374  av_log(avctx, AV_LOG_VERBOSE, "Temporal AQ not supported\n");
375  return AVERROR(ENOSYS);
376  }
377 
378  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_WEIGHTED_PREDICTION);
379  if (ctx->weighted_pred > 0 && ret <= 0) {
380  av_log (avctx, AV_LOG_VERBOSE, "Weighted Prediction not supported\n");
381  return AVERROR(ENOSYS);
382  }
383 
384  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_CABAC);
385  if (ctx->coder == NV_ENC_H264_ENTROPY_CODING_MODE_CABAC && ret <= 0) {
386  av_log(avctx, AV_LOG_VERBOSE, "CABAC entropy coding not supported\n");
387  return AVERROR(ENOSYS);
388  }
389 
390 #ifdef NVENC_HAVE_BFRAME_REF_MODE
391  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_BFRAME_REF_MODE);
392  if (ctx->b_ref_mode == NV_ENC_BFRAME_REF_MODE_EACH && ret != 1) {
393  av_log(avctx, AV_LOG_VERBOSE, "Each B frame as reference is not supported\n");
394  return AVERROR(ENOSYS);
395  } else if (ctx->b_ref_mode != NV_ENC_BFRAME_REF_MODE_DISABLED && ret == 0) {
396  av_log(avctx, AV_LOG_VERBOSE, "B frames as references are not supported\n");
397  return AVERROR(ENOSYS);
398  }
399 #else
400  if (ctx->b_ref_mode != 0) {
401  av_log(avctx, AV_LOG_VERBOSE, "B frames as references need SDK 8.1 at build time\n");
402  return AVERROR(ENOSYS);
403  }
404 #endif
405 
406  ctx->support_dyn_bitrate = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_DYN_BITRATE_CHANGE);
407 
408  return 0;
409 }
410 
411 static av_cold int nvenc_check_device(AVCodecContext *avctx, int idx)
412 {
413  NvencContext *ctx = avctx->priv_data;
415  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
416  char name[128] = { 0};
417  int major, minor, ret;
418  CUdevice cu_device;
419  int loglevel = AV_LOG_VERBOSE;
420 
421  if (ctx->device == LIST_DEVICES)
422  loglevel = AV_LOG_INFO;
423 
424  ret = CHECK_CU(dl_fn->cuda_dl->cuDeviceGet(&cu_device, idx));
425  if (ret < 0)
426  return ret;
427 
428  ret = CHECK_CU(dl_fn->cuda_dl->cuDeviceGetName(name, sizeof(name), cu_device));
429  if (ret < 0)
430  return ret;
431 
432  ret = CHECK_CU(dl_fn->cuda_dl->cuDeviceComputeCapability(&major, &minor, cu_device));
433  if (ret < 0)
434  return ret;
435 
436  av_log(avctx, loglevel, "[ GPU #%d - < %s > has Compute SM %d.%d ]\n", idx, name, major, minor);
437  if (((major << 4) | minor) < NVENC_CAP) {
438  av_log(avctx, loglevel, "does not support NVENC\n");
439  goto fail;
440  }
441 
442  if (ctx->device != idx && ctx->device != ANY_DEVICE)
443  return -1;
444 
445  ret = CHECK_CU(dl_fn->cuda_dl->cuCtxCreate(&ctx->cu_context_internal, 0, cu_device));
446  if (ret < 0)
447  goto fail;
448 
449  ctx->cu_context = ctx->cu_context_internal;
450 
451  if ((ret = nvenc_pop_context(avctx)) < 0)
452  goto fail2;
453 
454  if ((ret = nvenc_open_session(avctx)) < 0)
455  goto fail2;
456 
457  if ((ret = nvenc_check_capabilities(avctx)) < 0)
458  goto fail3;
459 
460  av_log(avctx, loglevel, "supports NVENC\n");
461 
462  dl_fn->nvenc_device_count++;
463 
464  if (ctx->device == idx || ctx->device == ANY_DEVICE)
465  return 0;
466 
467 fail3:
468  if ((ret = nvenc_push_context(avctx)) < 0)
469  return ret;
470 
471  p_nvenc->nvEncDestroyEncoder(ctx->nvencoder);
472  ctx->nvencoder = NULL;
473 
474  if ((ret = nvenc_pop_context(avctx)) < 0)
475  return ret;
476 
477 fail2:
478  CHECK_CU(dl_fn->cuda_dl->cuCtxDestroy(ctx->cu_context_internal));
479  ctx->cu_context_internal = NULL;
480 
481 fail:
482  return AVERROR(ENOSYS);
483 }
484 
486 {
487  NvencContext *ctx = avctx->priv_data;
489 
490  switch (avctx->codec->id) {
491  case AV_CODEC_ID_H264:
492  ctx->init_encode_params.encodeGUID = NV_ENC_CODEC_H264_GUID;
493  break;
494  case AV_CODEC_ID_HEVC:
495  ctx->init_encode_params.encodeGUID = NV_ENC_CODEC_HEVC_GUID;
496  break;
497  default:
498  return AVERROR_BUG;
499  }
500 
501  if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11 || avctx->hw_frames_ctx || avctx->hw_device_ctx) {
502  AVHWFramesContext *frames_ctx;
503  AVHWDeviceContext *hwdev_ctx;
504  AVCUDADeviceContext *cuda_device_hwctx = NULL;
505 #if CONFIG_D3D11VA
506  AVD3D11VADeviceContext *d3d11_device_hwctx = NULL;
507 #endif
508  int ret;
509 
510  if (avctx->hw_frames_ctx) {
511  frames_ctx = (AVHWFramesContext*)avctx->hw_frames_ctx->data;
512  if (frames_ctx->format == AV_PIX_FMT_CUDA)
513  cuda_device_hwctx = frames_ctx->device_ctx->hwctx;
514 #if CONFIG_D3D11VA
515  else if (frames_ctx->format == AV_PIX_FMT_D3D11)
516  d3d11_device_hwctx = frames_ctx->device_ctx->hwctx;
517 #endif
518  else
519  return AVERROR(EINVAL);
520  } else if (avctx->hw_device_ctx) {
521  hwdev_ctx = (AVHWDeviceContext*)avctx->hw_device_ctx->data;
522  if (hwdev_ctx->type == AV_HWDEVICE_TYPE_CUDA)
523  cuda_device_hwctx = hwdev_ctx->hwctx;
524 #if CONFIG_D3D11VA
525  else if (hwdev_ctx->type == AV_HWDEVICE_TYPE_D3D11VA)
526  d3d11_device_hwctx = hwdev_ctx->hwctx;
527 #endif
528  else
529  return AVERROR(EINVAL);
530  } else {
531  return AVERROR(EINVAL);
532  }
533 
534  if (cuda_device_hwctx) {
535  ctx->cu_context = cuda_device_hwctx->cuda_ctx;
536  }
537 #if CONFIG_D3D11VA
538  else if (d3d11_device_hwctx) {
539  ctx->d3d11_device = d3d11_device_hwctx->device;
540  ID3D11Device_AddRef(ctx->d3d11_device);
541  }
542 #endif
543 
544  ret = nvenc_open_session(avctx);
545  if (ret < 0)
546  return ret;
547 
548  ret = nvenc_check_capabilities(avctx);
549  if (ret < 0) {
550  av_log(avctx, AV_LOG_FATAL, "Provided device doesn't support required NVENC features\n");
551  return ret;
552  }
553  } else {
554  int i, nb_devices = 0;
555 
556  if (CHECK_CU(dl_fn->cuda_dl->cuInit(0)) < 0)
557  return AVERROR_UNKNOWN;
558 
559  if (CHECK_CU(dl_fn->cuda_dl->cuDeviceGetCount(&nb_devices)) < 0)
560  return AVERROR_UNKNOWN;
561 
562  if (!nb_devices) {
563  av_log(avctx, AV_LOG_FATAL, "No CUDA capable devices found\n");
564  return AVERROR_EXTERNAL;
565  }
566 
567  av_log(avctx, AV_LOG_VERBOSE, "%d CUDA capable devices found\n", nb_devices);
568 
569  dl_fn->nvenc_device_count = 0;
570  for (i = 0; i < nb_devices; ++i) {
571  if ((nvenc_check_device(avctx, i)) >= 0 && ctx->device != LIST_DEVICES)
572  return 0;
573  }
574 
575  if (ctx->device == LIST_DEVICES)
576  return AVERROR_EXIT;
577 
578  if (!dl_fn->nvenc_device_count) {
579  av_log(avctx, AV_LOG_FATAL, "No NVENC capable devices found\n");
580  return AVERROR_EXTERNAL;
581  }
582 
583  av_log(avctx, AV_LOG_FATAL, "Requested GPU %d, but only %d GPUs are available!\n", ctx->device, nb_devices);
584  return AVERROR(EINVAL);
585  }
586 
587  return 0;
588 }
589 
590 typedef struct GUIDTuple {
591  const GUID guid;
592  int flags;
593 } GUIDTuple;
594 
595 #define PRESET_ALIAS(alias, name, ...) \
596  [PRESET_ ## alias] = { NV_ENC_PRESET_ ## name ## _GUID, __VA_ARGS__ }
597 
598 #define PRESET(name, ...) PRESET_ALIAS(name, name, __VA_ARGS__)
599 
601 {
602  GUIDTuple presets[] = {
603  PRESET(DEFAULT),
604  PRESET(HP),
605  PRESET(HQ),
606  PRESET(BD),
607  PRESET_ALIAS(SLOW, HQ, NVENC_TWO_PASSES),
608  PRESET_ALIAS(MEDIUM, HQ, NVENC_ONE_PASS),
609  PRESET_ALIAS(FAST, HP, NVENC_ONE_PASS),
610  PRESET(LOW_LATENCY_DEFAULT, NVENC_LOWLATENCY),
611  PRESET(LOW_LATENCY_HP, NVENC_LOWLATENCY),
612  PRESET(LOW_LATENCY_HQ, NVENC_LOWLATENCY),
613  PRESET(LOSSLESS_DEFAULT, NVENC_LOSSLESS),
614  PRESET(LOSSLESS_HP, NVENC_LOSSLESS),
615  };
616 
617  GUIDTuple *t = &presets[ctx->preset];
618 
619  ctx->init_encode_params.presetGUID = t->guid;
620  ctx->flags = t->flags;
621 }
622 
623 #undef PRESET
624 #undef PRESET_ALIAS
625 
626 static av_cold void set_constqp(AVCodecContext *avctx)
627 {
628  NvencContext *ctx = avctx->priv_data;
629  NV_ENC_RC_PARAMS *rc = &ctx->encode_config.rcParams;
630 
631  rc->rateControlMode = NV_ENC_PARAMS_RC_CONSTQP;
632 
633  if (ctx->init_qp_p >= 0) {
634  rc->constQP.qpInterP = ctx->init_qp_p;
635  if (ctx->init_qp_i >= 0 && ctx->init_qp_b >= 0) {
636  rc->constQP.qpIntra = ctx->init_qp_i;
637  rc->constQP.qpInterB = ctx->init_qp_b;
638  } else if (avctx->i_quant_factor != 0.0 && avctx->b_quant_factor != 0.0) {
639  rc->constQP.qpIntra = av_clip(
640  rc->constQP.qpInterP * fabs(avctx->i_quant_factor) + avctx->i_quant_offset + 0.5, 0, 51);
641  rc->constQP.qpInterB = av_clip(
642  rc->constQP.qpInterP * fabs(avctx->b_quant_factor) + avctx->b_quant_offset + 0.5, 0, 51);
643  } else {
644  rc->constQP.qpIntra = rc->constQP.qpInterP;
645  rc->constQP.qpInterB = rc->constQP.qpInterP;
646  }
647  } else if (ctx->cqp >= 0) {
648  rc->constQP.qpInterP = rc->constQP.qpInterB = rc->constQP.qpIntra = ctx->cqp;
649  if (avctx->b_quant_factor != 0.0)
650  rc->constQP.qpInterB = av_clip(ctx->cqp * fabs(avctx->b_quant_factor) + avctx->b_quant_offset + 0.5, 0, 51);
651  if (avctx->i_quant_factor != 0.0)
652  rc->constQP.qpIntra = av_clip(ctx->cqp * fabs(avctx->i_quant_factor) + avctx->i_quant_offset + 0.5, 0, 51);
653  }
654 
655  avctx->qmin = -1;
656  avctx->qmax = -1;
657 }
658 
659 static av_cold void set_vbr(AVCodecContext *avctx)
660 {
661  NvencContext *ctx = avctx->priv_data;
662  NV_ENC_RC_PARAMS *rc = &ctx->encode_config.rcParams;
663  int qp_inter_p;
664 
665  if (avctx->qmin >= 0 && avctx->qmax >= 0) {
666  rc->enableMinQP = 1;
667  rc->enableMaxQP = 1;
668 
669  rc->minQP.qpInterB = avctx->qmin;
670  rc->minQP.qpInterP = avctx->qmin;
671  rc->minQP.qpIntra = avctx->qmin;
672 
673  rc->maxQP.qpInterB = avctx->qmax;
674  rc->maxQP.qpInterP = avctx->qmax;
675  rc->maxQP.qpIntra = avctx->qmax;
676 
677  qp_inter_p = (avctx->qmax + 3 * avctx->qmin) / 4; // biased towards Qmin
678  } else if (avctx->qmin >= 0) {
679  rc->enableMinQP = 1;
680 
681  rc->minQP.qpInterB = avctx->qmin;
682  rc->minQP.qpInterP = avctx->qmin;
683  rc->minQP.qpIntra = avctx->qmin;
684 
685  qp_inter_p = avctx->qmin;
686  } else {
687  qp_inter_p = 26; // default to 26
688  }
689 
690  rc->enableInitialRCQP = 1;
691 
692  if (ctx->init_qp_p < 0) {
693  rc->initialRCQP.qpInterP = qp_inter_p;
694  } else {
695  rc->initialRCQP.qpInterP = ctx->init_qp_p;
696  }
697 
698  if (ctx->init_qp_i < 0) {
699  if (avctx->i_quant_factor != 0.0 && avctx->b_quant_factor != 0.0) {
700  rc->initialRCQP.qpIntra = av_clip(
701  rc->initialRCQP.qpInterP * fabs(avctx->i_quant_factor) + avctx->i_quant_offset + 0.5, 0, 51);
702  } else {
703  rc->initialRCQP.qpIntra = rc->initialRCQP.qpInterP;
704  }
705  } else {
706  rc->initialRCQP.qpIntra = ctx->init_qp_i;
707  }
708 
709  if (ctx->init_qp_b < 0) {
710  if (avctx->i_quant_factor != 0.0 && avctx->b_quant_factor != 0.0) {
711  rc->initialRCQP.qpInterB = av_clip(
712  rc->initialRCQP.qpInterP * fabs(avctx->b_quant_factor) + avctx->b_quant_offset + 0.5, 0, 51);
713  } else {
714  rc->initialRCQP.qpInterB = rc->initialRCQP.qpInterP;
715  }
716  } else {
717  rc->initialRCQP.qpInterB = ctx->init_qp_b;
718  }
719 }
720 
722 {
723  NvencContext *ctx = avctx->priv_data;
724  NV_ENC_RC_PARAMS *rc = &ctx->encode_config.rcParams;
725 
726  rc->rateControlMode = NV_ENC_PARAMS_RC_CONSTQP;
727  rc->constQP.qpInterB = 0;
728  rc->constQP.qpInterP = 0;
729  rc->constQP.qpIntra = 0;
730 
731  avctx->qmin = -1;
732  avctx->qmax = -1;
733 }
734 
736 {
737  NvencContext *ctx = avctx->priv_data;
738  NV_ENC_RC_PARAMS *rc = &ctx->encode_config.rcParams;
739 
740  switch (ctx->rc) {
741  case NV_ENC_PARAMS_RC_CONSTQP:
742  set_constqp(avctx);
743  return;
744  case NV_ENC_PARAMS_RC_VBR_MINQP:
745  if (avctx->qmin < 0) {
746  av_log(avctx, AV_LOG_WARNING,
747  "The variable bitrate rate-control requires "
748  "the 'qmin' option set.\n");
749  set_vbr(avctx);
750  return;
751  }
752  /* fall through */
753  case NV_ENC_PARAMS_RC_VBR_HQ:
754  case NV_ENC_PARAMS_RC_VBR:
755  set_vbr(avctx);
756  break;
757  case NV_ENC_PARAMS_RC_CBR:
758  case NV_ENC_PARAMS_RC_CBR_HQ:
759  case NV_ENC_PARAMS_RC_CBR_LOWDELAY_HQ:
760  break;
761  }
762 
763  rc->rateControlMode = ctx->rc;
764 }
765 
767 {
768  NvencContext *ctx = avctx->priv_data;
769  // default minimum of 4 surfaces
770  // multiply by 2 for number of NVENCs on gpu (hardcode to 2)
771  // another multiply by 2 to avoid blocking next PBB group
772  int nb_surfaces = FFMAX(4, ctx->encode_config.frameIntervalP * 2 * 2);
773 
774  // lookahead enabled
775  if (ctx->rc_lookahead > 0) {
776  // +1 is to account for lkd_bound calculation later
777  // +4 is to allow sufficient pipelining with lookahead
778  nb_surfaces = FFMAX(1, FFMAX(nb_surfaces, ctx->rc_lookahead + ctx->encode_config.frameIntervalP + 1 + 4));
779  if (nb_surfaces > ctx->nb_surfaces && ctx->nb_surfaces > 0)
780  {
781  av_log(avctx, AV_LOG_WARNING,
782  "Defined rc_lookahead requires more surfaces, "
783  "increasing used surfaces %d -> %d\n", ctx->nb_surfaces, nb_surfaces);
784  }
785  ctx->nb_surfaces = FFMAX(nb_surfaces, ctx->nb_surfaces);
786  } else {
787  if (ctx->encode_config.frameIntervalP > 1 && ctx->nb_surfaces < nb_surfaces && ctx->nb_surfaces > 0)
788  {
789  av_log(avctx, AV_LOG_WARNING,
790  "Defined b-frame requires more surfaces, "
791  "increasing used surfaces %d -> %d\n", ctx->nb_surfaces, nb_surfaces);
792  ctx->nb_surfaces = FFMAX(ctx->nb_surfaces, nb_surfaces);
793  }
794  else if (ctx->nb_surfaces <= 0)
795  ctx->nb_surfaces = nb_surfaces;
796  // otherwise use user specified value
797  }
798 
800  ctx->async_depth = FFMIN(ctx->async_depth, ctx->nb_surfaces - 1);
801 
802  return 0;
803 }
804 
806 {
807  NvencContext *ctx = avctx->priv_data;
808 
809  if (avctx->global_quality > 0)
810  av_log(avctx, AV_LOG_WARNING, "Using global_quality with nvenc is deprecated. Use qp instead.\n");
811 
812  if (ctx->cqp < 0 && avctx->global_quality > 0)
813  ctx->cqp = avctx->global_quality;
814 
815  if (avctx->bit_rate > 0) {
816  ctx->encode_config.rcParams.averageBitRate = avctx->bit_rate;
817  } else if (ctx->encode_config.rcParams.averageBitRate > 0) {
818  ctx->encode_config.rcParams.maxBitRate = ctx->encode_config.rcParams.averageBitRate;
819  }
820 
821  if (avctx->rc_max_rate > 0)
822  ctx->encode_config.rcParams.maxBitRate = avctx->rc_max_rate;
823 
824  if (ctx->rc < 0) {
825  if (ctx->flags & NVENC_ONE_PASS)
826  ctx->twopass = 0;
827  if (ctx->flags & NVENC_TWO_PASSES)
828  ctx->twopass = 1;
829 
830  if (ctx->twopass < 0)
831  ctx->twopass = (ctx->flags & NVENC_LOWLATENCY) != 0;
832 
833  if (ctx->cbr) {
834  if (ctx->twopass) {
835  ctx->rc = NV_ENC_PARAMS_RC_CBR_LOWDELAY_HQ;
836  } else {
837  ctx->rc = NV_ENC_PARAMS_RC_CBR;
838  }
839  } else if (ctx->cqp >= 0) {
840  ctx->rc = NV_ENC_PARAMS_RC_CONSTQP;
841  } else if (ctx->twopass) {
842  ctx->rc = NV_ENC_PARAMS_RC_VBR_HQ;
843  } else if (avctx->qmin >= 0 && avctx->qmax >= 0) {
844  ctx->rc = NV_ENC_PARAMS_RC_VBR_MINQP;
845  }
846  }
847 
848  if (ctx->rc >= 0 && ctx->rc & RC_MODE_DEPRECATED) {
849  av_log(avctx, AV_LOG_WARNING, "Specified rc mode is deprecated.\n");
850  av_log(avctx, AV_LOG_WARNING, "\tll_2pass_quality -> cbr_ld_hq\n");
851  av_log(avctx, AV_LOG_WARNING, "\tll_2pass_size -> cbr_hq\n");
852  av_log(avctx, AV_LOG_WARNING, "\tvbr_2pass -> vbr_hq\n");
853  av_log(avctx, AV_LOG_WARNING, "\tvbr_minqp -> (no replacement)\n");
854 
855  ctx->rc &= ~RC_MODE_DEPRECATED;
856  }
857 
858  if (ctx->flags & NVENC_LOSSLESS) {
859  set_lossless(avctx);
860  } else if (ctx->rc >= 0) {
862  } else {
863  ctx->encode_config.rcParams.rateControlMode = NV_ENC_PARAMS_RC_VBR;
864  set_vbr(avctx);
865  }
866 
867  if (avctx->rc_buffer_size > 0) {
868  ctx->encode_config.rcParams.vbvBufferSize = avctx->rc_buffer_size;
869  } else if (ctx->encode_config.rcParams.averageBitRate > 0) {
870  avctx->rc_buffer_size = ctx->encode_config.rcParams.vbvBufferSize = 2 * ctx->encode_config.rcParams.averageBitRate;
871  }
872 
873  if (ctx->aq) {
874  ctx->encode_config.rcParams.enableAQ = 1;
875  ctx->encode_config.rcParams.aqStrength = ctx->aq_strength;
876  av_log(avctx, AV_LOG_VERBOSE, "AQ enabled.\n");
877  }
878 
879  if (ctx->temporal_aq) {
880  ctx->encode_config.rcParams.enableTemporalAQ = 1;
881  av_log(avctx, AV_LOG_VERBOSE, "Temporal AQ enabled.\n");
882  }
883 
884  if (ctx->rc_lookahead > 0) {
885  int lkd_bound = FFMIN(ctx->nb_surfaces, ctx->async_depth) -
886  ctx->encode_config.frameIntervalP - 4;
887 
888  if (lkd_bound < 0) {
889  av_log(avctx, AV_LOG_WARNING,
890  "Lookahead not enabled. Increase buffer delay (-delay).\n");
891  } else {
892  ctx->encode_config.rcParams.enableLookahead = 1;
893  ctx->encode_config.rcParams.lookaheadDepth = av_clip(ctx->rc_lookahead, 0, lkd_bound);
894  ctx->encode_config.rcParams.disableIadapt = ctx->no_scenecut;
895  ctx->encode_config.rcParams.disableBadapt = !ctx->b_adapt;
896  av_log(avctx, AV_LOG_VERBOSE,
897  "Lookahead enabled: depth %d, scenecut %s, B-adapt %s.\n",
898  ctx->encode_config.rcParams.lookaheadDepth,
899  ctx->encode_config.rcParams.disableIadapt ? "disabled" : "enabled",
900  ctx->encode_config.rcParams.disableBadapt ? "disabled" : "enabled");
901  }
902  }
903 
904  if (ctx->strict_gop) {
905  ctx->encode_config.rcParams.strictGOPTarget = 1;
906  av_log(avctx, AV_LOG_VERBOSE, "Strict GOP target enabled.\n");
907  }
908 
909  if (ctx->nonref_p)
910  ctx->encode_config.rcParams.enableNonRefP = 1;
911 
912  if (ctx->zerolatency)
913  ctx->encode_config.rcParams.zeroReorderDelay = 1;
914 
915  if (ctx->quality)
916  {
917  //convert from float to fixed point 8.8
918  int tmp_quality = (int)(ctx->quality * 256.0f);
919  ctx->encode_config.rcParams.targetQuality = (uint8_t)(tmp_quality >> 8);
920  ctx->encode_config.rcParams.targetQualityLSB = (uint8_t)(tmp_quality & 0xff);
921  }
922 }
923 
925 {
926  NvencContext *ctx = avctx->priv_data;
927  NV_ENC_CONFIG *cc = &ctx->encode_config;
928  NV_ENC_CONFIG_H264 *h264 = &cc->encodeCodecConfig.h264Config;
929  NV_ENC_CONFIG_H264_VUI_PARAMETERS *vui = &h264->h264VUIParameters;
930 
931  vui->colourMatrix = avctx->colorspace;
932  vui->colourPrimaries = avctx->color_primaries;
933  vui->transferCharacteristics = avctx->color_trc;
934  vui->videoFullRangeFlag = (avctx->color_range == AVCOL_RANGE_JPEG
936 
937  vui->colourDescriptionPresentFlag =
938  (avctx->colorspace != 2 || avctx->color_primaries != 2 || avctx->color_trc != 2);
939 
940  vui->videoSignalTypePresentFlag =
941  (vui->colourDescriptionPresentFlag
942  || vui->videoFormat != 5
943  || vui->videoFullRangeFlag != 0);
944 
945  h264->sliceMode = 3;
946  h264->sliceModeData = 1;
947 
948  h264->disableSPSPPS = (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) ? 1 : 0;
949  h264->repeatSPSPPS = (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) ? 0 : 1;
950  h264->outputAUD = ctx->aud;
951 
952  if (avctx->refs >= 0) {
953  /* 0 means "let the hardware decide" */
954  h264->maxNumRefFrames = avctx->refs;
955  }
956  if (avctx->gop_size >= 0) {
957  h264->idrPeriod = cc->gopLength;
958  }
959 
960  if (IS_CBR(cc->rcParams.rateControlMode)) {
961  h264->outputBufferingPeriodSEI = 1;
962  }
963 
964  h264->outputPictureTimingSEI = 1;
965 
966  if (cc->rcParams.rateControlMode == NV_ENC_PARAMS_RC_CBR_LOWDELAY_HQ ||
967  cc->rcParams.rateControlMode == NV_ENC_PARAMS_RC_CBR_HQ ||
968  cc->rcParams.rateControlMode == NV_ENC_PARAMS_RC_VBR_HQ) {
969  h264->adaptiveTransformMode = NV_ENC_H264_ADAPTIVE_TRANSFORM_ENABLE;
970  h264->fmoMode = NV_ENC_H264_FMO_DISABLE;
971  }
972 
973  if (ctx->flags & NVENC_LOSSLESS) {
974  h264->qpPrimeYZeroTransformBypassFlag = 1;
975  } else {
976  switch(ctx->profile) {
978  cc->profileGUID = NV_ENC_H264_PROFILE_BASELINE_GUID;
980  break;
982  cc->profileGUID = NV_ENC_H264_PROFILE_MAIN_GUID;
983  avctx->profile = FF_PROFILE_H264_MAIN;
984  break;
986  cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_GUID;
987  avctx->profile = FF_PROFILE_H264_HIGH;
988  break;
990  cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_444_GUID;
992  break;
993  }
994  }
995 
996  // force setting profile as high444p if input is AV_PIX_FMT_YUV444P
997  if (ctx->data_pix_fmt == AV_PIX_FMT_YUV444P) {
998  cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_444_GUID;
1000  }
1001 
1002  h264->chromaFormatIDC = avctx->profile == FF_PROFILE_H264_HIGH_444_PREDICTIVE ? 3 : 1;
1003 
1004  h264->level = ctx->level;
1005 
1006  if (ctx->coder >= 0)
1007  h264->entropyCodingMode = ctx->coder;
1008 
1009 #ifdef NVENC_HAVE_BFRAME_REF_MODE
1010  h264->useBFramesAsRef = ctx->b_ref_mode;
1011 #endif
1012 
1013  return 0;
1014 }
1015 
1017 {
1018  NvencContext *ctx = avctx->priv_data;
1019  NV_ENC_CONFIG *cc = &ctx->encode_config;
1020  NV_ENC_CONFIG_HEVC *hevc = &cc->encodeCodecConfig.hevcConfig;
1021  NV_ENC_CONFIG_HEVC_VUI_PARAMETERS *vui = &hevc->hevcVUIParameters;
1022 
1023  vui->colourMatrix = avctx->colorspace;
1024  vui->colourPrimaries = avctx->color_primaries;
1025  vui->transferCharacteristics = avctx->color_trc;
1026  vui->videoFullRangeFlag = (avctx->color_range == AVCOL_RANGE_JPEG
1028 
1029  vui->colourDescriptionPresentFlag =
1030  (avctx->colorspace != 2 || avctx->color_primaries != 2 || avctx->color_trc != 2);
1031 
1032  vui->videoSignalTypePresentFlag =
1033  (vui->colourDescriptionPresentFlag
1034  || vui->videoFormat != 5
1035  || vui->videoFullRangeFlag != 0);
1036 
1037  hevc->sliceMode = 3;
1038  hevc->sliceModeData = 1;
1039 
1040  hevc->disableSPSPPS = (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) ? 1 : 0;
1041  hevc->repeatSPSPPS = (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) ? 0 : 1;
1042  hevc->outputAUD = ctx->aud;
1043 
1044  if (avctx->refs >= 0) {
1045  /* 0 means "let the hardware decide" */
1046  hevc->maxNumRefFramesInDPB = avctx->refs;
1047  }
1048  if (avctx->gop_size >= 0) {
1049  hevc->idrPeriod = cc->gopLength;
1050  }
1051 
1052  if (IS_CBR(cc->rcParams.rateControlMode)) {
1053  hevc->outputBufferingPeriodSEI = 1;
1054  }
1055 
1056  hevc->outputPictureTimingSEI = 1;
1057 
1058  switch (ctx->profile) {
1060  cc->profileGUID = NV_ENC_HEVC_PROFILE_MAIN_GUID;
1061  avctx->profile = FF_PROFILE_HEVC_MAIN;
1062  break;
1064  cc->profileGUID = NV_ENC_HEVC_PROFILE_MAIN10_GUID;
1066  break;
1068  cc->profileGUID = NV_ENC_HEVC_PROFILE_FREXT_GUID;
1069  avctx->profile = FF_PROFILE_HEVC_REXT;
1070  break;
1071  }
1072 
1073  // force setting profile as main10 if input is 10 bit
1074  if (IS_10BIT(ctx->data_pix_fmt)) {
1075  cc->profileGUID = NV_ENC_HEVC_PROFILE_MAIN10_GUID;
1077  }
1078 
1079  // force setting profile as rext if input is yuv444
1080  if (IS_YUV444(ctx->data_pix_fmt)) {
1081  cc->profileGUID = NV_ENC_HEVC_PROFILE_FREXT_GUID;
1082  avctx->profile = FF_PROFILE_HEVC_REXT;
1083  }
1084 
1085  hevc->chromaFormatIDC = IS_YUV444(ctx->data_pix_fmt) ? 3 : 1;
1086 
1087  hevc->pixelBitDepthMinus8 = IS_10BIT(ctx->data_pix_fmt) ? 2 : 0;
1088 
1089  hevc->level = ctx->level;
1090 
1091  hevc->tier = ctx->tier;
1092 
1093 #ifdef NVENC_HAVE_HEVC_BFRAME_REF_MODE
1094  hevc->useBFramesAsRef = ctx->b_ref_mode;
1095 #endif
1096 
1097  return 0;
1098 }
1099 
1101 {
1102  switch (avctx->codec->id) {
1103  case AV_CODEC_ID_H264:
1104  return nvenc_setup_h264_config(avctx);
1105  case AV_CODEC_ID_HEVC:
1106  return nvenc_setup_hevc_config(avctx);
1107  /* Earlier switch/case will return if unknown codec is passed. */
1108  }
1109 
1110  return 0;
1111 }
1112 
1113 static void compute_dar(AVCodecContext *avctx, int *dw, int *dh) {
1114  int sw, sh;
1115 
1116  sw = avctx->width;
1117  sh = avctx->height;
1118 
1119  if (avctx->sample_aspect_ratio.num > 0 && avctx->sample_aspect_ratio.den > 0) {
1120  sw *= avctx->sample_aspect_ratio.num;
1121  sh *= avctx->sample_aspect_ratio.den;
1122  }
1123 
1124  av_reduce(dw, dh, sw, sh, 1024 * 1024);
1125 }
1126 
1128 {
1129  NvencContext *ctx = avctx->priv_data;
1131  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1132 
1133  NV_ENC_PRESET_CONFIG preset_config = { 0 };
1134  NVENCSTATUS nv_status = NV_ENC_SUCCESS;
1135  AVCPBProperties *cpb_props;
1136  int res = 0;
1137  int dw, dh;
1138 
1139  ctx->encode_config.version = NV_ENC_CONFIG_VER;
1140  ctx->init_encode_params.version = NV_ENC_INITIALIZE_PARAMS_VER;
1141 
1142  ctx->init_encode_params.encodeHeight = avctx->height;
1143  ctx->init_encode_params.encodeWidth = avctx->width;
1144 
1145  ctx->init_encode_params.encodeConfig = &ctx->encode_config;
1146 
1147  nvenc_map_preset(ctx);
1148 
1149  preset_config.version = NV_ENC_PRESET_CONFIG_VER;
1150  preset_config.presetCfg.version = NV_ENC_CONFIG_VER;
1151 
1152  nv_status = p_nvenc->nvEncGetEncodePresetConfig(ctx->nvencoder,
1153  ctx->init_encode_params.encodeGUID,
1154  ctx->init_encode_params.presetGUID,
1155  &preset_config);
1156  if (nv_status != NV_ENC_SUCCESS)
1157  return nvenc_print_error(avctx, nv_status, "Cannot get the preset configuration");
1158 
1159  memcpy(&ctx->encode_config, &preset_config.presetCfg, sizeof(ctx->encode_config));
1160 
1161  ctx->encode_config.version = NV_ENC_CONFIG_VER;
1162 
1163  compute_dar(avctx, &dw, &dh);
1164  ctx->init_encode_params.darHeight = dh;
1165  ctx->init_encode_params.darWidth = dw;
1166 
1167  if (avctx->framerate.num > 0 && avctx->framerate.den > 0) {
1168  ctx->init_encode_params.frameRateNum = avctx->framerate.num;
1169  ctx->init_encode_params.frameRateDen = avctx->framerate.den;
1170  } else {
1171  ctx->init_encode_params.frameRateNum = avctx->time_base.den;
1172  ctx->init_encode_params.frameRateDen = avctx->time_base.num * avctx->ticks_per_frame;
1173  }
1174 
1175  ctx->init_encode_params.enableEncodeAsync = 0;
1176  ctx->init_encode_params.enablePTD = 1;
1177 
1178  if (ctx->weighted_pred == 1)
1179  ctx->init_encode_params.enableWeightedPrediction = 1;
1180 
1181  if (ctx->bluray_compat) {
1182  ctx->aud = 1;
1183  avctx->refs = FFMIN(FFMAX(avctx->refs, 0), 6);
1184  avctx->max_b_frames = FFMIN(avctx->max_b_frames, 3);
1185  switch (avctx->codec->id) {
1186  case AV_CODEC_ID_H264:
1187  /* maximum level depends on used resolution */
1188  break;
1189  case AV_CODEC_ID_HEVC:
1190  ctx->level = NV_ENC_LEVEL_HEVC_51;
1191  ctx->tier = NV_ENC_TIER_HEVC_HIGH;
1192  break;
1193  }
1194  }
1195 
1196  if (avctx->gop_size > 0) {
1197  if (avctx->max_b_frames >= 0) {
1198  /* 0 is intra-only, 1 is I/P only, 2 is one B-Frame, 3 two B-frames, and so on. */
1199  ctx->encode_config.frameIntervalP = avctx->max_b_frames + 1;
1200  }
1201 
1202  ctx->encode_config.gopLength = avctx->gop_size;
1203  } else if (avctx->gop_size == 0) {
1204  ctx->encode_config.frameIntervalP = 0;
1205  ctx->encode_config.gopLength = 1;
1206  }
1207 
1208  ctx->initial_pts[0] = AV_NOPTS_VALUE;
1209  ctx->initial_pts[1] = AV_NOPTS_VALUE;
1210 
1211  nvenc_recalc_surfaces(avctx);
1212 
1213  nvenc_setup_rate_control(avctx);
1214 
1215  if (avctx->flags & AV_CODEC_FLAG_INTERLACED_DCT) {
1216  ctx->encode_config.frameFieldMode = NV_ENC_PARAMS_FRAME_FIELD_MODE_FIELD;
1217  } else {
1218  ctx->encode_config.frameFieldMode = NV_ENC_PARAMS_FRAME_FIELD_MODE_FRAME;
1219  }
1220 
1221  res = nvenc_setup_codec_config(avctx);
1222  if (res)
1223  return res;
1224 
1225  res = nvenc_push_context(avctx);
1226  if (res < 0)
1227  return res;
1228 
1229  nv_status = p_nvenc->nvEncInitializeEncoder(ctx->nvencoder, &ctx->init_encode_params);
1230 
1231  res = nvenc_pop_context(avctx);
1232  if (res < 0)
1233  return res;
1234 
1235  if (nv_status != NV_ENC_SUCCESS) {
1236  return nvenc_print_error(avctx, nv_status, "InitializeEncoder failed");
1237  }
1238 
1239  if (ctx->encode_config.frameIntervalP > 1)
1240  avctx->has_b_frames = 2;
1241 
1242  if (ctx->encode_config.rcParams.averageBitRate > 0)
1243  avctx->bit_rate = ctx->encode_config.rcParams.averageBitRate;
1244 
1245  cpb_props = ff_add_cpb_side_data(avctx);
1246  if (!cpb_props)
1247  return AVERROR(ENOMEM);
1248  cpb_props->max_bitrate = ctx->encode_config.rcParams.maxBitRate;
1249  cpb_props->avg_bitrate = avctx->bit_rate;
1250  cpb_props->buffer_size = ctx->encode_config.rcParams.vbvBufferSize;
1251 
1252  return 0;
1253 }
1254 
1255 static NV_ENC_BUFFER_FORMAT nvenc_map_buffer_format(enum AVPixelFormat pix_fmt)
1256 {
1257  switch (pix_fmt) {
1258  case AV_PIX_FMT_YUV420P:
1259  return NV_ENC_BUFFER_FORMAT_YV12_PL;
1260  case AV_PIX_FMT_NV12:
1261  return NV_ENC_BUFFER_FORMAT_NV12_PL;
1262  case AV_PIX_FMT_P010:
1263  case AV_PIX_FMT_P016:
1264  return NV_ENC_BUFFER_FORMAT_YUV420_10BIT;
1265  case AV_PIX_FMT_YUV444P:
1266  return NV_ENC_BUFFER_FORMAT_YUV444_PL;
1267  case AV_PIX_FMT_YUV444P16:
1268  return NV_ENC_BUFFER_FORMAT_YUV444_10BIT;
1269  case AV_PIX_FMT_0RGB32:
1270  return NV_ENC_BUFFER_FORMAT_ARGB;
1271  case AV_PIX_FMT_0BGR32:
1272  return NV_ENC_BUFFER_FORMAT_ABGR;
1273  default:
1274  return NV_ENC_BUFFER_FORMAT_UNDEFINED;
1275  }
1276 }
1277 
1278 static av_cold int nvenc_alloc_surface(AVCodecContext *avctx, int idx)
1279 {
1280  NvencContext *ctx = avctx->priv_data;
1282  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1283  NvencSurface* tmp_surface = &ctx->surfaces[idx];
1284 
1285  NVENCSTATUS nv_status;
1286  NV_ENC_CREATE_BITSTREAM_BUFFER allocOut = { 0 };
1287  allocOut.version = NV_ENC_CREATE_BITSTREAM_BUFFER_VER;
1288 
1289  if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11) {
1290  ctx->surfaces[idx].in_ref = av_frame_alloc();
1291  if (!ctx->surfaces[idx].in_ref)
1292  return AVERROR(ENOMEM);
1293  } else {
1294  NV_ENC_CREATE_INPUT_BUFFER allocSurf = { 0 };
1295 
1297  if (ctx->surfaces[idx].format == NV_ENC_BUFFER_FORMAT_UNDEFINED) {
1298  av_log(avctx, AV_LOG_FATAL, "Invalid input pixel format: %s\n",
1300  return AVERROR(EINVAL);
1301  }
1302 
1303  allocSurf.version = NV_ENC_CREATE_INPUT_BUFFER_VER;
1304  allocSurf.width = avctx->width;
1305  allocSurf.height = avctx->height;
1306  allocSurf.bufferFmt = ctx->surfaces[idx].format;
1307 
1308  nv_status = p_nvenc->nvEncCreateInputBuffer(ctx->nvencoder, &allocSurf);
1309  if (nv_status != NV_ENC_SUCCESS) {
1310  return nvenc_print_error(avctx, nv_status, "CreateInputBuffer failed");
1311  }
1312 
1313  ctx->surfaces[idx].input_surface = allocSurf.inputBuffer;
1314  ctx->surfaces[idx].width = allocSurf.width;
1315  ctx->surfaces[idx].height = allocSurf.height;
1316  }
1317 
1318  nv_status = p_nvenc->nvEncCreateBitstreamBuffer(ctx->nvencoder, &allocOut);
1319  if (nv_status != NV_ENC_SUCCESS) {
1320  int err = nvenc_print_error(avctx, nv_status, "CreateBitstreamBuffer failed");
1321  if (avctx->pix_fmt != AV_PIX_FMT_CUDA && avctx->pix_fmt != AV_PIX_FMT_D3D11)
1322  p_nvenc->nvEncDestroyInputBuffer(ctx->nvencoder, ctx->surfaces[idx].input_surface);
1323  av_frame_free(&ctx->surfaces[idx].in_ref);
1324  return err;
1325  }
1326 
1327  ctx->surfaces[idx].output_surface = allocOut.bitstreamBuffer;
1328  ctx->surfaces[idx].size = allocOut.size;
1329 
1330  av_fifo_generic_write(ctx->unused_surface_queue, &tmp_surface, sizeof(tmp_surface), NULL);
1331 
1332  return 0;
1333 }
1334 
1336 {
1337  NvencContext *ctx = avctx->priv_data;
1338  int i, res = 0, res2;
1339 
1340  ctx->surfaces = av_mallocz_array(ctx->nb_surfaces, sizeof(*ctx->surfaces));
1341  if (!ctx->surfaces)
1342  return AVERROR(ENOMEM);
1343 
1344  ctx->timestamp_list = av_fifo_alloc(ctx->nb_surfaces * sizeof(int64_t));
1345  if (!ctx->timestamp_list)
1346  return AVERROR(ENOMEM);
1347 
1349  if (!ctx->unused_surface_queue)
1350  return AVERROR(ENOMEM);
1351 
1353  if (!ctx->output_surface_queue)
1354  return AVERROR(ENOMEM);
1356  if (!ctx->output_surface_ready_queue)
1357  return AVERROR(ENOMEM);
1358 
1359  res = nvenc_push_context(avctx);
1360  if (res < 0)
1361  return res;
1362 
1363  for (i = 0; i < ctx->nb_surfaces; i++) {
1364  if ((res = nvenc_alloc_surface(avctx, i)) < 0)
1365  goto fail;
1366  }
1367 
1368 fail:
1369  res2 = nvenc_pop_context(avctx);
1370  if (res2 < 0)
1371  return res2;
1372 
1373  return res;
1374 }
1375 
1377 {
1378  NvencContext *ctx = avctx->priv_data;
1380  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1381 
1382  NVENCSTATUS nv_status;
1383  uint32_t outSize = 0;
1384  char tmpHeader[256];
1385  NV_ENC_SEQUENCE_PARAM_PAYLOAD payload = { 0 };
1386  payload.version = NV_ENC_SEQUENCE_PARAM_PAYLOAD_VER;
1387 
1388  payload.spsppsBuffer = tmpHeader;
1389  payload.inBufferSize = sizeof(tmpHeader);
1390  payload.outSPSPPSPayloadSize = &outSize;
1391 
1392  nv_status = p_nvenc->nvEncGetSequenceParams(ctx->nvencoder, &payload);
1393  if (nv_status != NV_ENC_SUCCESS) {
1394  return nvenc_print_error(avctx, nv_status, "GetSequenceParams failed");
1395  }
1396 
1397  avctx->extradata_size = outSize;
1399 
1400  if (!avctx->extradata) {
1401  return AVERROR(ENOMEM);
1402  }
1403 
1404  memcpy(avctx->extradata, tmpHeader, outSize);
1405 
1406  return 0;
1407 }
1408 
1410 {
1411  NvencContext *ctx = avctx->priv_data;
1413  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1414  int i, res;
1415 
1416  /* the encoder has to be flushed before it can be closed */
1417  if (ctx->nvencoder) {
1418  NV_ENC_PIC_PARAMS params = { .version = NV_ENC_PIC_PARAMS_VER,
1419  .encodePicFlags = NV_ENC_PIC_FLAG_EOS };
1420 
1421  res = nvenc_push_context(avctx);
1422  if (res < 0)
1423  return res;
1424 
1425  p_nvenc->nvEncEncodePicture(ctx->nvencoder, &params);
1426  }
1427 
1432 
1433  if (ctx->surfaces && (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11)) {
1434  for (i = 0; i < ctx->nb_registered_frames; i++) {
1435  if (ctx->registered_frames[i].mapped)
1436  p_nvenc->nvEncUnmapInputResource(ctx->nvencoder, ctx->registered_frames[i].in_map.mappedResource);
1437  if (ctx->registered_frames[i].regptr)
1438  p_nvenc->nvEncUnregisterResource(ctx->nvencoder, ctx->registered_frames[i].regptr);
1439  }
1440  ctx->nb_registered_frames = 0;
1441  }
1442 
1443  if (ctx->surfaces) {
1444  for (i = 0; i < ctx->nb_surfaces; ++i) {
1445  if (avctx->pix_fmt != AV_PIX_FMT_CUDA && avctx->pix_fmt != AV_PIX_FMT_D3D11)
1446  p_nvenc->nvEncDestroyInputBuffer(ctx->nvencoder, ctx->surfaces[i].input_surface);
1447  av_frame_free(&ctx->surfaces[i].in_ref);
1448  p_nvenc->nvEncDestroyBitstreamBuffer(ctx->nvencoder, ctx->surfaces[i].output_surface);
1449  }
1450  }
1451  av_freep(&ctx->surfaces);
1452  ctx->nb_surfaces = 0;
1453 
1454  if (ctx->nvencoder) {
1455  p_nvenc->nvEncDestroyEncoder(ctx->nvencoder);
1456 
1457  res = nvenc_pop_context(avctx);
1458  if (res < 0)
1459  return res;
1460  }
1461  ctx->nvencoder = NULL;
1462 
1463  if (ctx->cu_context_internal)
1464  CHECK_CU(dl_fn->cuda_dl->cuCtxDestroy(ctx->cu_context_internal));
1465  ctx->cu_context = ctx->cu_context_internal = NULL;
1466 
1467 #if CONFIG_D3D11VA
1468  if (ctx->d3d11_device) {
1469  ID3D11Device_Release(ctx->d3d11_device);
1470  ctx->d3d11_device = NULL;
1471  }
1472 #endif
1473 
1474  nvenc_free_functions(&dl_fn->nvenc_dl);
1475  cuda_free_functions(&dl_fn->cuda_dl);
1476 
1477  dl_fn->nvenc_device_count = 0;
1478 
1479  av_log(avctx, AV_LOG_VERBOSE, "Nvenc unloaded\n");
1480 
1481  return 0;
1482 }
1483 
1485 {
1486  NvencContext *ctx = avctx->priv_data;
1487  int ret;
1488 
1489  if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11) {
1490  AVHWFramesContext *frames_ctx;
1491  if (!avctx->hw_frames_ctx) {
1492  av_log(avctx, AV_LOG_ERROR,
1493  "hw_frames_ctx must be set when using GPU frames as input\n");
1494  return AVERROR(EINVAL);
1495  }
1496  frames_ctx = (AVHWFramesContext*)avctx->hw_frames_ctx->data;
1497  if (frames_ctx->format != avctx->pix_fmt) {
1498  av_log(avctx, AV_LOG_ERROR,
1499  "hw_frames_ctx must match the GPU frame type\n");
1500  return AVERROR(EINVAL);
1501  }
1502  ctx->data_pix_fmt = frames_ctx->sw_format;
1503  } else {
1504  ctx->data_pix_fmt = avctx->pix_fmt;
1505  }
1506 
1507  if ((ret = nvenc_load_libraries(avctx)) < 0)
1508  return ret;
1509 
1510  if ((ret = nvenc_setup_device(avctx)) < 0)
1511  return ret;
1512 
1513  if ((ret = nvenc_setup_encoder(avctx)) < 0)
1514  return ret;
1515 
1516  if ((ret = nvenc_setup_surfaces(avctx)) < 0)
1517  return ret;
1518 
1519  if (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) {
1520  if ((ret = nvenc_setup_extradata(avctx)) < 0)
1521  return ret;
1522  }
1523 
1524  return 0;
1525 }
1526 
1528 {
1529  NvencSurface *tmp_surf;
1530 
1531  if (!(av_fifo_size(ctx->unused_surface_queue) > 0))
1532  // queue empty
1533  return NULL;
1534 
1535  av_fifo_generic_read(ctx->unused_surface_queue, &tmp_surf, sizeof(tmp_surf), NULL);
1536  return tmp_surf;
1537 }
1538 
1539 static int nvenc_copy_frame(AVCodecContext *avctx, NvencSurface *nv_surface,
1540  NV_ENC_LOCK_INPUT_BUFFER *lock_buffer_params, const AVFrame *frame)
1541 {
1542  int dst_linesize[4] = {
1543  lock_buffer_params->pitch,
1544  lock_buffer_params->pitch,
1545  lock_buffer_params->pitch,
1546  lock_buffer_params->pitch
1547  };
1548  uint8_t *dst_data[4];
1549  int ret;
1550 
1551  if (frame->format == AV_PIX_FMT_YUV420P)
1552  dst_linesize[1] = dst_linesize[2] >>= 1;
1553 
1554  ret = av_image_fill_pointers(dst_data, frame->format, nv_surface->height,
1555  lock_buffer_params->bufferDataPtr, dst_linesize);
1556  if (ret < 0)
1557  return ret;
1558 
1559  if (frame->format == AV_PIX_FMT_YUV420P)
1560  FFSWAP(uint8_t*, dst_data[1], dst_data[2]);
1561 
1562  av_image_copy(dst_data, dst_linesize,
1563  (const uint8_t**)frame->data, frame->linesize, frame->format,
1564  avctx->width, avctx->height);
1565 
1566  return 0;
1567 }
1568 
1570 {
1571  NvencContext *ctx = avctx->priv_data;
1573  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1574  NVENCSTATUS nv_status;
1575 
1576  int i, first_round;
1577 
1579  for (first_round = 1; first_round >= 0; first_round--) {
1580  for (i = 0; i < ctx->nb_registered_frames; i++) {
1581  if (!ctx->registered_frames[i].mapped) {
1582  if (ctx->registered_frames[i].regptr) {
1583  if (first_round)
1584  continue;
1585  nv_status = p_nvenc->nvEncUnregisterResource(ctx->nvencoder, ctx->registered_frames[i].regptr);
1586  if (nv_status != NV_ENC_SUCCESS)
1587  return nvenc_print_error(avctx, nv_status, "Failed unregistering unused input resource");
1588  ctx->registered_frames[i].ptr = NULL;
1589  ctx->registered_frames[i].regptr = NULL;
1590  }
1591  return i;
1592  }
1593  }
1594  }
1595  } else {
1596  return ctx->nb_registered_frames++;
1597  }
1598 
1599  av_log(avctx, AV_LOG_ERROR, "Too many registered CUDA frames\n");
1600  return AVERROR(ENOMEM);
1601 }
1602 
1604 {
1605  NvencContext *ctx = avctx->priv_data;
1607  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1608 
1609  AVHWFramesContext *frames_ctx = (AVHWFramesContext*)frame->hw_frames_ctx->data;
1610  NV_ENC_REGISTER_RESOURCE reg;
1611  int i, idx, ret;
1612 
1613  for (i = 0; i < ctx->nb_registered_frames; i++) {
1614  if (avctx->pix_fmt == AV_PIX_FMT_CUDA && ctx->registered_frames[i].ptr == frame->data[0])
1615  return i;
1616  else if (avctx->pix_fmt == AV_PIX_FMT_D3D11 && ctx->registered_frames[i].ptr == frame->data[0] && ctx->registered_frames[i].ptr_index == (intptr_t)frame->data[1])
1617  return i;
1618  }
1619 
1620  idx = nvenc_find_free_reg_resource(avctx);
1621  if (idx < 0)
1622  return idx;
1623 
1624  reg.version = NV_ENC_REGISTER_RESOURCE_VER;
1625  reg.width = frames_ctx->width;
1626  reg.height = frames_ctx->height;
1627  reg.pitch = frame->linesize[0];
1628  reg.resourceToRegister = frame->data[0];
1629 
1630  if (avctx->pix_fmt == AV_PIX_FMT_CUDA) {
1631  reg.resourceType = NV_ENC_INPUT_RESOURCE_TYPE_CUDADEVICEPTR;
1632  }
1633  else if (avctx->pix_fmt == AV_PIX_FMT_D3D11) {
1634  reg.resourceType = NV_ENC_INPUT_RESOURCE_TYPE_DIRECTX;
1635  reg.subResourceIndex = (intptr_t)frame->data[1];
1636  }
1637 
1638  reg.bufferFormat = nvenc_map_buffer_format(frames_ctx->sw_format);
1639  if (reg.bufferFormat == NV_ENC_BUFFER_FORMAT_UNDEFINED) {
1640  av_log(avctx, AV_LOG_FATAL, "Invalid input pixel format: %s\n",
1641  av_get_pix_fmt_name(frames_ctx->sw_format));
1642  return AVERROR(EINVAL);
1643  }
1644 
1645  ret = p_nvenc->nvEncRegisterResource(ctx->nvencoder, &reg);
1646  if (ret != NV_ENC_SUCCESS) {
1647  nvenc_print_error(avctx, ret, "Error registering an input resource");
1648  return AVERROR_UNKNOWN;
1649  }
1650 
1651  ctx->registered_frames[idx].ptr = frame->data[0];
1652  ctx->registered_frames[idx].ptr_index = reg.subResourceIndex;
1653  ctx->registered_frames[idx].regptr = reg.registeredResource;
1654  return idx;
1655 }
1656 
1658  NvencSurface *nvenc_frame)
1659 {
1660  NvencContext *ctx = avctx->priv_data;
1662  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1663 
1664  int res;
1665  NVENCSTATUS nv_status;
1666 
1667  if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11) {
1668  int reg_idx = nvenc_register_frame(avctx, frame);
1669  if (reg_idx < 0) {
1670  av_log(avctx, AV_LOG_ERROR, "Could not register an input HW frame\n");
1671  return reg_idx;
1672  }
1673 
1674  res = av_frame_ref(nvenc_frame->in_ref, frame);
1675  if (res < 0)
1676  return res;
1677 
1678  if (!ctx->registered_frames[reg_idx].mapped) {
1679  ctx->registered_frames[reg_idx].in_map.version = NV_ENC_MAP_INPUT_RESOURCE_VER;
1680  ctx->registered_frames[reg_idx].in_map.registeredResource = ctx->registered_frames[reg_idx].regptr;
1681  nv_status = p_nvenc->nvEncMapInputResource(ctx->nvencoder, &ctx->registered_frames[reg_idx].in_map);
1682  if (nv_status != NV_ENC_SUCCESS) {
1683  av_frame_unref(nvenc_frame->in_ref);
1684  return nvenc_print_error(avctx, nv_status, "Error mapping an input resource");
1685  }
1686  }
1687 
1688  ctx->registered_frames[reg_idx].mapped += 1;
1689 
1690  nvenc_frame->reg_idx = reg_idx;
1691  nvenc_frame->input_surface = ctx->registered_frames[reg_idx].in_map.mappedResource;
1692  nvenc_frame->format = ctx->registered_frames[reg_idx].in_map.mappedBufferFmt;
1693  nvenc_frame->pitch = frame->linesize[0];
1694 
1695  return 0;
1696  } else {
1697  NV_ENC_LOCK_INPUT_BUFFER lockBufferParams = { 0 };
1698 
1699  lockBufferParams.version = NV_ENC_LOCK_INPUT_BUFFER_VER;
1700  lockBufferParams.inputBuffer = nvenc_frame->input_surface;
1701 
1702  nv_status = p_nvenc->nvEncLockInputBuffer(ctx->nvencoder, &lockBufferParams);
1703  if (nv_status != NV_ENC_SUCCESS) {
1704  return nvenc_print_error(avctx, nv_status, "Failed locking nvenc input buffer");
1705  }
1706 
1707  nvenc_frame->pitch = lockBufferParams.pitch;
1708  res = nvenc_copy_frame(avctx, nvenc_frame, &lockBufferParams, frame);
1709 
1710  nv_status = p_nvenc->nvEncUnlockInputBuffer(ctx->nvencoder, nvenc_frame->input_surface);
1711  if (nv_status != NV_ENC_SUCCESS) {
1712  return nvenc_print_error(avctx, nv_status, "Failed unlocking input buffer!");
1713  }
1714 
1715  return res;
1716  }
1717 }
1718 
1720  NV_ENC_PIC_PARAMS *params,
1721  NV_ENC_SEI_PAYLOAD *sei_data)
1722 {
1723  NvencContext *ctx = avctx->priv_data;
1724 
1725  switch (avctx->codec->id) {
1726  case AV_CODEC_ID_H264:
1727  params->codecPicParams.h264PicParams.sliceMode =
1728  ctx->encode_config.encodeCodecConfig.h264Config.sliceMode;
1729  params->codecPicParams.h264PicParams.sliceModeData =
1730  ctx->encode_config.encodeCodecConfig.h264Config.sliceModeData;
1731  if (sei_data) {
1732  params->codecPicParams.h264PicParams.seiPayloadArray = sei_data;
1733  params->codecPicParams.h264PicParams.seiPayloadArrayCnt = 1;
1734  }
1735 
1736  break;
1737  case AV_CODEC_ID_HEVC:
1738  params->codecPicParams.hevcPicParams.sliceMode =
1739  ctx->encode_config.encodeCodecConfig.hevcConfig.sliceMode;
1740  params->codecPicParams.hevcPicParams.sliceModeData =
1741  ctx->encode_config.encodeCodecConfig.hevcConfig.sliceModeData;
1742  if (sei_data) {
1743  params->codecPicParams.hevcPicParams.seiPayloadArray = sei_data;
1744  params->codecPicParams.hevcPicParams.seiPayloadArrayCnt = 1;
1745  }
1746 
1747  break;
1748  }
1749 }
1750 
1751 static inline void timestamp_queue_enqueue(AVFifoBuffer* queue, int64_t timestamp)
1752 {
1753  av_fifo_generic_write(queue, &timestamp, sizeof(timestamp), NULL);
1754 }
1755 
1756 static inline int64_t timestamp_queue_dequeue(AVFifoBuffer* queue)
1757 {
1758  int64_t timestamp = AV_NOPTS_VALUE;
1759  if (av_fifo_size(queue) > 0)
1760  av_fifo_generic_read(queue, &timestamp, sizeof(timestamp), NULL);
1761 
1762  return timestamp;
1763 }
1764 
1766  NV_ENC_LOCK_BITSTREAM *params,
1767  AVPacket *pkt)
1768 {
1769  NvencContext *ctx = avctx->priv_data;
1770 
1771  pkt->pts = params->outputTimeStamp;
1772 
1773  /* generate the first dts by linearly extrapolating the
1774  * first two pts values to the past */
1775  if (avctx->max_b_frames > 0 && !ctx->first_packet_output &&
1776  ctx->initial_pts[1] != AV_NOPTS_VALUE) {
1777  int64_t ts0 = ctx->initial_pts[0], ts1 = ctx->initial_pts[1];
1778  int64_t delta;
1779 
1780  if ((ts0 < 0 && ts1 > INT64_MAX + ts0) ||
1781  (ts0 > 0 && ts1 < INT64_MIN + ts0))
1782  return AVERROR(ERANGE);
1783  delta = ts1 - ts0;
1784 
1785  if ((delta < 0 && ts0 > INT64_MAX + delta) ||
1786  (delta > 0 && ts0 < INT64_MIN + delta))
1787  return AVERROR(ERANGE);
1788  pkt->dts = ts0 - delta;
1789 
1790  ctx->first_packet_output = 1;
1791  } else {
1793  }
1794 
1795  pkt->dts -= avctx->max_b_frames;
1796 
1797  return 0;
1798 }
1799 
1801 {
1802  NvencContext *ctx = avctx->priv_data;
1804  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1805 
1806  uint32_t slice_mode_data;
1807  uint32_t *slice_offsets = NULL;
1808  NV_ENC_LOCK_BITSTREAM lock_params = { 0 };
1809  NVENCSTATUS nv_status;
1810  int res = 0;
1811 
1812  enum AVPictureType pict_type;
1813 
1814  switch (avctx->codec->id) {
1815  case AV_CODEC_ID_H264:
1816  slice_mode_data = ctx->encode_config.encodeCodecConfig.h264Config.sliceModeData;
1817  break;
1818  case AV_CODEC_ID_H265:
1819  slice_mode_data = ctx->encode_config.encodeCodecConfig.hevcConfig.sliceModeData;
1820  break;
1821  default:
1822  av_log(avctx, AV_LOG_ERROR, "Unknown codec name\n");
1823  res = AVERROR(EINVAL);
1824  goto error;
1825  }
1826  slice_offsets = av_mallocz(slice_mode_data * sizeof(*slice_offsets));
1827 
1828  if (!slice_offsets) {
1829  res = AVERROR(ENOMEM);
1830  goto error;
1831  }
1832 
1833  lock_params.version = NV_ENC_LOCK_BITSTREAM_VER;
1834 
1835  lock_params.doNotWait = 0;
1836  lock_params.outputBitstream = tmpoutsurf->output_surface;
1837  lock_params.sliceOffsets = slice_offsets;
1838 
1839  nv_status = p_nvenc->nvEncLockBitstream(ctx->nvencoder, &lock_params);
1840  if (nv_status != NV_ENC_SUCCESS) {
1841  res = nvenc_print_error(avctx, nv_status, "Failed locking bitstream buffer");
1842  goto error;
1843  }
1844 
1845  res = pkt->data ?
1846  ff_alloc_packet2(avctx, pkt, lock_params.bitstreamSizeInBytes, lock_params.bitstreamSizeInBytes) :
1847  av_new_packet(pkt, lock_params.bitstreamSizeInBytes);
1848 
1849  if (res < 0) {
1850  p_nvenc->nvEncUnlockBitstream(ctx->nvencoder, tmpoutsurf->output_surface);
1851  goto error;
1852  }
1853 
1854  memcpy(pkt->data, lock_params.bitstreamBufferPtr, lock_params.bitstreamSizeInBytes);
1855 
1856  nv_status = p_nvenc->nvEncUnlockBitstream(ctx->nvencoder, tmpoutsurf->output_surface);
1857  if (nv_status != NV_ENC_SUCCESS) {
1858  res = nvenc_print_error(avctx, nv_status, "Failed unlocking bitstream buffer, expect the gates of mordor to open");
1859  goto error;
1860  }
1861 
1862 
1863  if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11) {
1864  ctx->registered_frames[tmpoutsurf->reg_idx].mapped -= 1;
1865  if (ctx->registered_frames[tmpoutsurf->reg_idx].mapped == 0) {
1866  nv_status = p_nvenc->nvEncUnmapInputResource(ctx->nvencoder, ctx->registered_frames[tmpoutsurf->reg_idx].in_map.mappedResource);
1867  if (nv_status != NV_ENC_SUCCESS) {
1868  res = nvenc_print_error(avctx, nv_status, "Failed unmapping input resource");
1869  goto error;
1870  }
1871  } else if (ctx->registered_frames[tmpoutsurf->reg_idx].mapped < 0) {
1872  res = AVERROR_BUG;
1873  goto error;
1874  }
1875 
1876  av_frame_unref(tmpoutsurf->in_ref);
1877 
1878  tmpoutsurf->input_surface = NULL;
1879  }
1880 
1881  switch (lock_params.pictureType) {
1882  case NV_ENC_PIC_TYPE_IDR:
1883  pkt->flags |= AV_PKT_FLAG_KEY;
1884  case NV_ENC_PIC_TYPE_I:
1885  pict_type = AV_PICTURE_TYPE_I;
1886  break;
1887  case NV_ENC_PIC_TYPE_P:
1888  pict_type = AV_PICTURE_TYPE_P;
1889  break;
1890  case NV_ENC_PIC_TYPE_B:
1891  pict_type = AV_PICTURE_TYPE_B;
1892  break;
1893  case NV_ENC_PIC_TYPE_BI:
1894  pict_type = AV_PICTURE_TYPE_BI;
1895  break;
1896  default:
1897  av_log(avctx, AV_LOG_ERROR, "Unknown picture type encountered, expect the output to be broken.\n");
1898  av_log(avctx, AV_LOG_ERROR, "Please report this error and include as much information on how to reproduce it as possible.\n");
1899  res = AVERROR_EXTERNAL;
1900  goto error;
1901  }
1902 
1903 #if FF_API_CODED_FRAME
1905  avctx->coded_frame->pict_type = pict_type;
1907 #endif
1908 
1910  (lock_params.frameAvgQP - 1) * FF_QP2LAMBDA, NULL, 0, pict_type);
1911 
1912  res = nvenc_set_timestamp(avctx, &lock_params, pkt);
1913  if (res < 0)
1914  goto error2;
1915 
1916  av_free(slice_offsets);
1917 
1918  return 0;
1919 
1920 error:
1922 
1923 error2:
1924  av_free(slice_offsets);
1925 
1926  return res;
1927 }
1928 
1929 static int output_ready(AVCodecContext *avctx, int flush)
1930 {
1931  NvencContext *ctx = avctx->priv_data;
1932  int nb_ready, nb_pending;
1933 
1934  /* when B-frames are enabled, we wait for two initial timestamps to
1935  * calculate the first dts */
1936  if (!flush && avctx->max_b_frames > 0 &&
1937  (ctx->initial_pts[0] == AV_NOPTS_VALUE || ctx->initial_pts[1] == AV_NOPTS_VALUE))
1938  return 0;
1939 
1940  nb_ready = av_fifo_size(ctx->output_surface_ready_queue) / sizeof(NvencSurface*);
1941  nb_pending = av_fifo_size(ctx->output_surface_queue) / sizeof(NvencSurface*);
1942  if (flush)
1943  return nb_ready > 0;
1944  return (nb_ready > 0) && (nb_ready + nb_pending >= ctx->async_depth);
1945 }
1946 
1947 static void reconfig_encoder(AVCodecContext *avctx, const AVFrame *frame)
1948 {
1949  NvencContext *ctx = avctx->priv_data;
1950  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
1951  NVENCSTATUS ret;
1952 
1953  NV_ENC_RECONFIGURE_PARAMS params = { 0 };
1954  int needs_reconfig = 0;
1955  int needs_encode_config = 0;
1956  int reconfig_bitrate = 0, reconfig_dar = 0;
1957  int dw, dh;
1958 
1959  params.version = NV_ENC_RECONFIGURE_PARAMS_VER;
1960  params.reInitEncodeParams = ctx->init_encode_params;
1961 
1962  compute_dar(avctx, &dw, &dh);
1963  if (dw != ctx->init_encode_params.darWidth || dh != ctx->init_encode_params.darHeight) {
1964  av_log(avctx, AV_LOG_VERBOSE,
1965  "aspect ratio change (DAR): %d:%d -> %d:%d\n",
1966  ctx->init_encode_params.darWidth,
1967  ctx->init_encode_params.darHeight, dw, dh);
1968 
1969  params.reInitEncodeParams.darHeight = dh;
1970  params.reInitEncodeParams.darWidth = dw;
1971 
1972  needs_reconfig = 1;
1973  reconfig_dar = 1;
1974  }
1975 
1976  if (ctx->rc != NV_ENC_PARAMS_RC_CONSTQP && ctx->support_dyn_bitrate) {
1977  if (avctx->bit_rate > 0 && params.reInitEncodeParams.encodeConfig->rcParams.averageBitRate != avctx->bit_rate) {
1978  av_log(avctx, AV_LOG_VERBOSE,
1979  "avg bitrate change: %d -> %d\n",
1980  params.reInitEncodeParams.encodeConfig->rcParams.averageBitRate,
1981  (uint32_t)avctx->bit_rate);
1982 
1983  params.reInitEncodeParams.encodeConfig->rcParams.averageBitRate = avctx->bit_rate;
1984  reconfig_bitrate = 1;
1985  }
1986 
1987  if (avctx->rc_max_rate > 0 && ctx->encode_config.rcParams.maxBitRate != avctx->rc_max_rate) {
1988  av_log(avctx, AV_LOG_VERBOSE,
1989  "max bitrate change: %d -> %d\n",
1990  params.reInitEncodeParams.encodeConfig->rcParams.maxBitRate,
1991  (uint32_t)avctx->rc_max_rate);
1992 
1993  params.reInitEncodeParams.encodeConfig->rcParams.maxBitRate = avctx->rc_max_rate;
1994  reconfig_bitrate = 1;
1995  }
1996 
1997  if (avctx->rc_buffer_size > 0 && ctx->encode_config.rcParams.vbvBufferSize != avctx->rc_buffer_size) {
1998  av_log(avctx, AV_LOG_VERBOSE,
1999  "vbv buffer size change: %d -> %d\n",
2000  params.reInitEncodeParams.encodeConfig->rcParams.vbvBufferSize,
2001  avctx->rc_buffer_size);
2002 
2003  params.reInitEncodeParams.encodeConfig->rcParams.vbvBufferSize = avctx->rc_buffer_size;
2004  reconfig_bitrate = 1;
2005  }
2006 
2007  if (reconfig_bitrate) {
2008  params.resetEncoder = 1;
2009  params.forceIDR = 1;
2010 
2011  needs_encode_config = 1;
2012  needs_reconfig = 1;
2013  }
2014  }
2015 
2016  if (!needs_encode_config)
2017  params.reInitEncodeParams.encodeConfig = NULL;
2018 
2019  if (needs_reconfig) {
2020  ret = p_nvenc->nvEncReconfigureEncoder(ctx->nvencoder, &params);
2021  if (ret != NV_ENC_SUCCESS) {
2022  nvenc_print_error(avctx, ret, "failed to reconfigure nvenc");
2023  } else {
2024  if (reconfig_dar) {
2025  ctx->init_encode_params.darHeight = dh;
2026  ctx->init_encode_params.darWidth = dw;
2027  }
2028 
2029  if (reconfig_bitrate) {
2030  ctx->encode_config.rcParams.averageBitRate = params.reInitEncodeParams.encodeConfig->rcParams.averageBitRate;
2031  ctx->encode_config.rcParams.maxBitRate = params.reInitEncodeParams.encodeConfig->rcParams.maxBitRate;
2032  ctx->encode_config.rcParams.vbvBufferSize = params.reInitEncodeParams.encodeConfig->rcParams.vbvBufferSize;
2033  }
2034 
2035  }
2036  }
2037 }
2038 
2040 {
2041  NVENCSTATUS nv_status;
2042  NvencSurface *tmp_out_surf, *in_surf;
2043  int res, res2;
2044  NV_ENC_SEI_PAYLOAD *sei_data = NULL;
2045  size_t sei_size;
2046 
2047  NvencContext *ctx = avctx->priv_data;
2049  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
2050 
2051  NV_ENC_PIC_PARAMS pic_params = { 0 };
2052  pic_params.version = NV_ENC_PIC_PARAMS_VER;
2053 
2054  if ((!ctx->cu_context && !ctx->d3d11_device) || !ctx->nvencoder)
2055  return AVERROR(EINVAL);
2056 
2057  if (ctx->encoder_flushing) {
2058  if (avctx->internal->draining)
2059  return AVERROR_EOF;
2060 
2061  ctx->encoder_flushing = 0;
2062  ctx->first_packet_output = 0;
2063  ctx->initial_pts[0] = AV_NOPTS_VALUE;
2064  ctx->initial_pts[1] = AV_NOPTS_VALUE;
2066  }
2067 
2068  if (frame) {
2069  in_surf = get_free_frame(ctx);
2070  if (!in_surf)
2071  return AVERROR(EAGAIN);
2072 
2073  res = nvenc_push_context(avctx);
2074  if (res < 0)
2075  return res;
2076 
2077  reconfig_encoder(avctx, frame);
2078 
2079  res = nvenc_upload_frame(avctx, frame, in_surf);
2080 
2081  res2 = nvenc_pop_context(avctx);
2082  if (res2 < 0)
2083  return res2;
2084 
2085  if (res)
2086  return res;
2087 
2088  pic_params.inputBuffer = in_surf->input_surface;
2089  pic_params.bufferFmt = in_surf->format;
2090  pic_params.inputWidth = in_surf->width;
2091  pic_params.inputHeight = in_surf->height;
2092  pic_params.inputPitch = in_surf->pitch;
2093  pic_params.outputBitstream = in_surf->output_surface;
2094 
2095  if (avctx->flags & AV_CODEC_FLAG_INTERLACED_DCT) {
2096  if (frame->top_field_first)
2097  pic_params.pictureStruct = NV_ENC_PIC_STRUCT_FIELD_TOP_BOTTOM;
2098  else
2099  pic_params.pictureStruct = NV_ENC_PIC_STRUCT_FIELD_BOTTOM_TOP;
2100  } else {
2101  pic_params.pictureStruct = NV_ENC_PIC_STRUCT_FRAME;
2102  }
2103 
2104  if (ctx->forced_idr >= 0 && frame->pict_type == AV_PICTURE_TYPE_I) {
2105  pic_params.encodePicFlags =
2106  ctx->forced_idr ? NV_ENC_PIC_FLAG_FORCEIDR : NV_ENC_PIC_FLAG_FORCEINTRA;
2107  } else {
2108  pic_params.encodePicFlags = 0;
2109  }
2110 
2111  pic_params.inputTimeStamp = frame->pts;
2112 
2113  if (ctx->a53_cc && av_frame_get_side_data(frame, AV_FRAME_DATA_A53_CC)) {
2114  if (ff_alloc_a53_sei(frame, sizeof(NV_ENC_SEI_PAYLOAD), (void**)&sei_data, &sei_size) < 0) {
2115  av_log(ctx, AV_LOG_ERROR, "Not enough memory for closed captions, skipping\n");
2116  }
2117 
2118  if (sei_data) {
2119  sei_data->payloadSize = (uint32_t)sei_size;
2120  sei_data->payloadType = 4;
2121  sei_data->payload = (uint8_t*)(sei_data + 1);
2122  }
2123  }
2124 
2125  nvenc_codec_specific_pic_params(avctx, &pic_params, sei_data);
2126  } else {
2127  pic_params.encodePicFlags = NV_ENC_PIC_FLAG_EOS;
2128  ctx->encoder_flushing = 1;
2129  }
2130 
2131  res = nvenc_push_context(avctx);
2132  if (res < 0)
2133  return res;
2134 
2135  nv_status = p_nvenc->nvEncEncodePicture(ctx->nvencoder, &pic_params);
2136  av_free(sei_data);
2137 
2138  res = nvenc_pop_context(avctx);
2139  if (res < 0)
2140  return res;
2141 
2142  if (nv_status != NV_ENC_SUCCESS &&
2143  nv_status != NV_ENC_ERR_NEED_MORE_INPUT)
2144  return nvenc_print_error(avctx, nv_status, "EncodePicture failed!");
2145 
2146  if (frame) {
2147  av_fifo_generic_write(ctx->output_surface_queue, &in_surf, sizeof(in_surf), NULL);
2149 
2150  if (ctx->initial_pts[0] == AV_NOPTS_VALUE)
2151  ctx->initial_pts[0] = frame->pts;
2152  else if (ctx->initial_pts[1] == AV_NOPTS_VALUE)
2153  ctx->initial_pts[1] = frame->pts;
2154  }
2155 
2156  /* all the pending buffers are now ready for output */
2157  if (nv_status == NV_ENC_SUCCESS) {
2158  while (av_fifo_size(ctx->output_surface_queue) > 0) {
2159  av_fifo_generic_read(ctx->output_surface_queue, &tmp_out_surf, sizeof(tmp_out_surf), NULL);
2160  av_fifo_generic_write(ctx->output_surface_ready_queue, &tmp_out_surf, sizeof(tmp_out_surf), NULL);
2161  }
2162  }
2163 
2164  return 0;
2165 }
2166 
2168 {
2169  NvencSurface *tmp_out_surf;
2170  int res, res2;
2171 
2172  NvencContext *ctx = avctx->priv_data;
2173 
2174  if ((!ctx->cu_context && !ctx->d3d11_device) || !ctx->nvencoder)
2175  return AVERROR(EINVAL);
2176 
2177  if (output_ready(avctx, ctx->encoder_flushing)) {
2178  av_fifo_generic_read(ctx->output_surface_ready_queue, &tmp_out_surf, sizeof(tmp_out_surf), NULL);
2179 
2180  res = nvenc_push_context(avctx);
2181  if (res < 0)
2182  return res;
2183 
2184  res = process_output_surface(avctx, pkt, tmp_out_surf);
2185 
2186  res2 = nvenc_pop_context(avctx);
2187  if (res2 < 0)
2188  return res2;
2189 
2190  if (res)
2191  return res;
2192 
2193  av_fifo_generic_write(ctx->unused_surface_queue, &tmp_out_surf, sizeof(tmp_out_surf), NULL);
2194  } else if (ctx->encoder_flushing) {
2195  return AVERROR_EOF;
2196  } else {
2197  return AVERROR(EAGAIN);
2198  }
2199 
2200  return 0;
2201 }
2202 
2204  const AVFrame *frame, int *got_packet)
2205 {
2206  NvencContext *ctx = avctx->priv_data;
2207  int res;
2208 
2209  if (!ctx->encoder_flushing) {
2210  res = ff_nvenc_send_frame(avctx, frame);
2211  if (res < 0)
2212  return res;
2213  }
2214 
2215  res = ff_nvenc_receive_packet(avctx, pkt);
2216  if (res == AVERROR(EAGAIN) || res == AVERROR_EOF) {
2217  *got_packet = 0;
2218  } else if (res < 0) {
2219  return res;
2220  } else {
2221  *got_packet = 1;
2222  }
2223 
2224  return 0;
2225 }
const GUID guid
Definition: nvenc.c:591
#define FF_PROFILE_H264_MAIN
Definition: avcodec.h:2939
const char * name
Definition: avisynth_c.h:867
This struct aggregates all the (hardware/vendor-specific) "high-level" state, i.e.
Definition: hwcontext.h:60
int no_scenecut
Definition: nvenc.h:176
#define NULL
Definition: coverity.c:32
const struct AVCodec * codec
Definition: avcodec.h:1574
AVRational framerate
Definition: avcodec.h:3105
const char const char void * val
Definition: avisynth_c.h:863
BI type.
Definition: avutil.h:280
void * nvencoder
Definition: nvenc.h:162
int support_dyn_bitrate
Definition: nvenc.h:160
av_cold int ff_nvenc_encode_close(AVCodecContext *avctx)
Definition: nvenc.c:1409
int twopass
Definition: nvenc.h:170
#define CHECK_CU(x)
Definition: nvenc.c:35
static enum AVPixelFormat pix_fmt
NV_ENC_BUFFER_FORMAT format
Definition: nvenc.h:67
int height
Definition: nvenc.h:63
This structure describes decoded (raw) audio or video data.
Definition: frame.h:295
static av_cold int nvenc_setup_codec_config(AVCodecContext *avctx)
Definition: nvenc.c:1100
AVFifoBuffer * timestamp_list
Definition: nvenc.h:138
int ff_side_data_set_encoder_stats(AVPacket *pkt, int quality, int64_t *error, int error_count, int pict_type)
Definition: avpacket.c:720
static void flush(AVCodecContext *avctx)
NvencFunctions * nvenc_dl
Definition: nvenc.h:74
int mapped
Definition: nvenc.h:146
#define AV_CODEC_FLAG_INTERLACED_DCT
Use interlaced DCT.
Definition: avcodec.h:896
static av_cold void set_vbr(AVCodecContext *avctx)
Definition: nvenc.c:659
AVFrame * in_ref
Definition: nvenc.h:60
planar YUV 4:4:4, 24bpp, (1 Cr & Cb sample per 1x1 Y samples)
Definition: pixfmt.h:71
misc image utilities
#define AV_LOG_WARNING
Something somehow does not look correct.
Definition: log.h:182
int64_t bit_rate
the average bitrate
Definition: avcodec.h:1615
#define RC_MODE_DEPRECATED
Definition: nvenc.h:40
Memory handling functions.
static av_cold int nvenc_setup_device(AVCodecContext *avctx)
Definition: nvenc.c:485
const char * desc
Definition: nvenc.c:68
int max_bitrate
Maximum bitrate of the stream, in bits per second.
Definition: avcodec.h:1134
int max_b_frames
maximum number of B-frames between non-B-frames Note: The output will be delayed by max_b_frames+1 re...
Definition: avcodec.h:1825
int encoder_flushing
Definition: nvenc.h:140
int forced_idr
Definition: nvenc.h:177
enum AVColorRange color_range
MPEG vs JPEG YUV range.
Definition: avcodec.h:2200
int num
Numerator.
Definition: rational.h:59
#define PRESET_ALIAS(alias, name,...)
Definition: nvenc.c:595
static av_cold int nvenc_setup_surfaces(AVCodecContext *avctx)
Definition: nvenc.c:1335
NV_ENCODE_API_FUNCTION_LIST nvenc_funcs
Definition: nvenc.h:76
NvencDynLoadFunctions nvenc_dload_funcs
Definition: nvenc.h:124
ID3D11Device * d3d11_device
Definition: nvenc.h:130
AVRational sample_aspect_ratio
sample aspect ratio (0 if unknown) That is the width of a pixel divided by the height of the pixel...
Definition: avcodec.h:1944
int width
The allocated dimensions of the frames in this pool.
Definition: hwcontext.h:228
int first_packet_output
Definition: nvenc.h:158
enum AVPixelFormat pix_fmt
Pixel format, see AV_PIX_FMT_xxx.
Definition: avcodec.h:1775
enum AVPixelFormat format
The pixel format identifying the underlying HW surface type.
Definition: hwcontext.h:208
int ff_nvenc_receive_packet(AVCodecContext *avctx, AVPacket *pkt)
Definition: nvenc.c:2167
static av_cold int nvenc_recalc_surfaces(AVCodecContext *avctx)
Definition: nvenc.c:766
static AVPacket pkt
int init_qp_b
Definition: nvenc.h:188
#define PRESET(name,...)
Definition: nvenc.c:598
int profile
profile
Definition: avcodec.h:2898
int preset
Definition: nvenc.h:164
float i_quant_offset
qscale offset between P and I-frames
Definition: avcodec.h:1877
static void nvenc_override_rate_control(AVCodecContext *avctx)
Definition: nvenc.c:735
static NvencSurface * get_free_frame(NvencContext *ctx)
Definition: nvenc.c:1527
static av_cold void nvenc_setup_rate_control(AVCodecContext *avctx)
Definition: nvenc.c:805
int pitch
Definition: nvenc.h:64
int av_fifo_generic_write(AVFifoBuffer *f, void *src, int size, int(*func)(void *, void *, int))
Feed data from a user-supplied callback to an AVFifoBuffer.
Definition: fifo.c:122
int nvenc_device_count
Definition: nvenc.h:77
#define FF_PROFILE_H264_HIGH_444_PREDICTIVE
Definition: avcodec.h:2949
NV_ENC_INPUT_PTR input_surface
Definition: nvenc.h:59
AVRational time_base
This is the fundamental unit of time (in seconds) in terms of which frame timestamps are represented...
Definition: avcodec.h:1688
NVENCSTATUS nverr
Definition: nvenc.c:66
AVFrameSideData * av_frame_get_side_data(const AVFrame *frame, enum AVFrameSideDataType type)
Definition: frame.c:734
AVBufferRef * hw_frames_ctx
For hwaccel-format frames, this should be a reference to the AVHWFramesContext describing the frame...
Definition: frame.h:634
int aq
Definition: nvenc.h:175
#define AV_PIX_FMT_P016
Definition: pixfmt.h:437
int b_ref_mode
Definition: nvenc.h:193
#define AV_PIX_FMT_P010
Definition: pixfmt.h:436
CUcontext cu_context
Definition: nvenc.h:128
int ff_alloc_packet2(AVCodecContext *avctx, AVPacket *avpkt, int64_t size, int64_t min_size)
Check AVPacket size and/or allocate data.
Definition: encode.c:32
#define FF_PROFILE_H264_BASELINE
Definition: avcodec.h:2937
#define DEFAULT
Definition: avdct.c:28
uint8_t
AVFifoBuffer * unused_surface_queue
Definition: nvenc.h:135
#define av_cold
Definition: attributes.h:82
#define av_malloc(s)
AVFrame * av_frame_alloc(void)
Allocate an AVFrame and set its fields to default values.
Definition: frame.c:189
float delta
enum AVPixelFormat ff_nvenc_pix_fmts[]
Definition: nvenc.c:42
float b_quant_factor
qscale factor between IP and B-frames If > 0 then the last P-frame quantizer will be used (q= lastp_q...
Definition: avcodec.h:1834
int init_qp_p
Definition: nvenc.h:187
static int nvenc_pop_context(AVCodecContext *avctx)
Definition: nvenc.c:216
#define FF_PROFILE_HEVC_MAIN
Definition: avcodec.h:2986
int av_frame_ref(AVFrame *dst, const AVFrame *src)
Set up a new reference to the data described by the source frame.
Definition: frame.c:443
int64_t pts
Presentation timestamp in time_base units (time when frame should be shown to user).
Definition: frame.h:388
uint8_t * extradata
some codecs need / can use extradata like Huffman tables.
Definition: avcodec.h:1666
float quality
Definition: nvenc.h:184
NV_ENC_INITIALIZE_PARAMS init_encode_params
Definition: nvenc.h:126
static AVFrame * frame
void * hwctx
The format-specific data, allocated and freed by libavutil along with this context.
Definition: hwcontext.h:91
static av_cold int nvenc_alloc_surface(AVCodecContext *avctx, int idx)
Definition: nvenc.c:1278
#define height
ID3D11Device * device
Device used for texture creation and access.
#define MAX_REGISTERED_FRAMES
Definition: nvenc.h:39
uint8_t * data
Definition: avcodec.h:1477
static av_cold int nvenc_setup_extradata(AVCodecContext *avctx)
Definition: nvenc.c:1376
planar YUV 4:2:2, 16bpp, full scale (JPEG), deprecated in favor of AV_PIX_FMT_YUV422P and setting col...
Definition: pixfmt.h:79
#define AVERROR_EOF
End of file.
Definition: error.h:55
#define AV_LOG_VERBOSE
Detailed information.
Definition: log.h:192
static int nvenc_check_capabilities(AVCodecContext *avctx)
Definition: nvenc.c:307
#define AV_PIX_FMT_YUV444P16
Definition: pixfmt.h:400
static int nvenc_register_frame(AVCodecContext *avctx, const AVFrame *frame)
Definition: nvenc.c:1603
int buffer_size
The size of the buffer to which the ratecontrol is applied, in bits.
Definition: avcodec.h:1161
int av_reduce(int *dst_num, int *dst_den, int64_t num, int64_t den, int64_t max)
Reduce a fraction.
Definition: rational.c:35
#define FF_PROFILE_HEVC_MAIN_10
Definition: avcodec.h:2987
AVFifoBuffer * output_surface_ready_queue
Definition: nvenc.h:137
#define av_log(a,...)
CUcontext cu_context_internal
Definition: nvenc.h:129
An API-specific header for AV_HWDEVICE_TYPE_CUDA.
#define AV_PKT_FLAG_KEY
The packet contains a keyframe.
Definition: avcodec.h:1509
int ptr_index
Definition: nvenc.h:144
int async_depth
Definition: nvenc.h:173
int av_new_packet(AVPacket *pkt, int size)
Allocate the payload of a packet and initialize its fields with default values.
Definition: avpacket.c:86
enum AVCodecID id
Definition: avcodec.h:3495
#define i(width, name, range_min, range_max)
Definition: cbs_h2645.c:259
static av_cold int nvenc_open_session(AVCodecContext *avctx)
Definition: nvenc.c:228
void * ptr
Definition: nvenc.h:143
#define AV_LOG_ERROR
Something went wrong and cannot losslessly be recovered.
Definition: log.h:176
int has_b_frames
Size of the frame reordering buffer in the decoder.
Definition: avcodec.h:1855
int coder
Definition: nvenc.h:192
static void timestamp_queue_enqueue(AVFifoBuffer *queue, int64_t timestamp)
Definition: nvenc.c:1751
int rc
Definition: nvenc.h:168
#define AVERROR(e)
Definition: error.h:43
int nb_registered_frames
Definition: nvenc.h:149
void av_frame_free(AVFrame **frame)
Free the frame and any dynamically allocated objects in it, e.g.
Definition: frame.c:202
int qmax
maximum quantizer
Definition: avcodec.h:2414
static int nvenc_map_error(NVENCSTATUS err, const char **desc)
Definition: nvenc.c:98
ATSC A53 Part 4 Closed Captions.
Definition: frame.h:58
int av_fifo_generic_read(AVFifoBuffer *f, void *dest, int buf_size, void(*func)(void *, void *, int))
Feed data from an AVFifoBuffer to a user-supplied callback.
Definition: fifo.c:213
#define FF_PROFILE_H264_HIGH
Definition: avcodec.h:2941
int flags
AV_CODEC_FLAG_*.
Definition: avcodec.h:1645
planar YUV 4:2:0, 12bpp, 1 plane for Y and 1 plane for the UV components, which are interleaved (firs...
Definition: pixfmt.h:89
simple assert() macros that are a bit more flexible than ISO C assert().
void * av_mallocz(size_t size)
Allocate a memory block with alignment suitable for all memory accesses (including vectors if availab...
Definition: mem.c:236
#define AV_PIX_FMT_0BGR32
Definition: pixfmt.h:365
float i_quant_factor
qscale factor between P- and I-frames If > 0 then the last P-frame quantizer will be used (q = lastp_...
Definition: avcodec.h:1870
int ff_nvenc_send_frame(AVCodecContext *avctx, const AVFrame *frame)
Definition: nvenc.c:2039
enum AVHWDeviceType type
This field identifies the underlying API used for hardware access.
Definition: hwcontext.h:78
static av_cold int nvenc_setup_hevc_config(AVCodecContext *avctx)
Definition: nvenc.c:1016
static NV_ENC_BUFFER_FORMAT nvenc_map_buffer_format(enum AVPixelFormat pix_fmt)
Definition: nvenc.c:1255
#define FFMAX(a, b)
Definition: common.h:94
static av_cold void set_constqp(AVCodecContext *avctx)
Definition: nvenc.c:626
#define fail()
Definition: checkasm.h:120
void av_image_copy(uint8_t *dst_data[4], int dst_linesizes[4], const uint8_t *src_data[4], const int src_linesizes[4], enum AVPixelFormat pix_fmt, int width, int height)
Copy image in src_data to dst_data.
Definition: imgutils.c:387
int level
Definition: nvenc.h:166
int flags
A combination of AV_PKT_FLAG values.
Definition: avcodec.h:1483
int bluray_compat
Definition: nvenc.h:186
int rc_buffer_size
decoder bitstream buffer size
Definition: avcodec.h:2428
int aq_strength
Definition: nvenc.h:183
static int nvenc_check_codec_support(AVCodecContext *avctx)
Definition: nvenc.c:254
int refs
number of reference frames
Definition: avcodec.h:2153
int flags
Definition: nvenc.h:172
struct NvencContext::@126 registered_frames[MAX_REGISTERED_FRAMES]
enum AVPictureType pict_type
Picture type of the frame.
Definition: frame.h:378
static int nvenc_upload_frame(AVCodecContext *avctx, const AVFrame *frame, NvencSurface *nvenc_frame)
Definition: nvenc.c:1657
NV_ENC_REGISTERED_PTR regptr
Definition: nvenc.h:145
#define FFMIN(a, b)
Definition: common.h:96
static av_cold int nvenc_setup_encoder(AVCodecContext *avctx)
Definition: nvenc.c:1127
#define AVERROR_BUFFER_TOO_SMALL
Buffer too small.
Definition: error.h:51
AVHWDeviceContext * device_ctx
The parent AVHWDeviceContext.
Definition: hwcontext.h:148
planar YUV 4:2:0, 12bpp, full scale (JPEG), deprecated in favor of AV_PIX_FMT_YUV420P and setting col...
Definition: pixfmt.h:78
av_cold int ff_nvenc_encode_init(AVCodecContext *avctx)
Definition: nvenc.c:1484
#define width
static int process_output_surface(AVCodecContext *avctx, AVPacket *pkt, NvencSurface *tmpoutsurf)
Definition: nvenc.c:1800
int ff_nvenc_encode_frame(AVCodecContext *avctx, AVPacket *pkt, const AVFrame *frame, int *got_packet)
Definition: nvenc.c:2203
int width
picture width / height.
Definition: avcodec.h:1738
AVBufferRef * hw_frames_ctx
A reference to the AVHWFramesContext describing the input (for encoding) or output (decoding) frames...
Definition: avcodec.h:3262
#define NVENC_CAP
Definition: nvenc.c:37
AVFormatContext * ctx
Definition: movenc.c:48
enum AVColorPrimaries color_primaries
Chromaticity coordinates of the source primaries.
Definition: avcodec.h:2179
static int nvenc_copy_frame(AVCodecContext *avctx, NvencSurface *nv_surface, NV_ENC_LOCK_INPUT_BUFFER *lock_buffer_params, const AVFrame *frame)
Definition: nvenc.c:1539
#define IS_YUV444(pix_fmt)
Definition: nvenc.c:62
int dummy
Definition: motion.c:64
int ticks_per_frame
For some codecs, the time base is closer to the field rate than the frame rate.
Definition: avcodec.h:1697
int profile
Definition: nvenc.h:165
AVFifoBuffer * output_surface_queue
Definition: nvenc.h:136
static void nvenc_print_driver_requirement(AVCodecContext *avctx, int level)
Definition: nvenc.c:123
#define AVERROR_EXIT
Immediate exit was requested; the called function should not be restarted.
Definition: error.h:56
if(ret< 0)
Definition: vf_mcdeint.c:279
HW acceleration through CUDA.
Definition: pixfmt.h:235
static void error(const char *err)
static av_cold int nvenc_setup_h264_config(AVCodecContext *avctx)
Definition: nvenc.c:924
int draining
checks API usage: after codec draining, flush is required to resume operation
Definition: internal.h:195
#define FF_ARRAY_ELEMS(a)
the normal 2^n-1 "JPEG" YUV ranges
Definition: pixfmt.h:522
static int nvenc_print_error(void *log_ctx, NVENCSTATUS err, const char *error_string)
Definition: nvenc.c:113
CudaFunctions * cuda_dl
Definition: nvenc.h:73
enum AVPixelFormat data_pix_fmt
Definition: nvenc.h:153
#define IS_10BIT(pix_fmt)
Definition: nvenc.c:58
int format
format of the frame, -1 if unknown or unset Values correspond to enum AVPixelFormat for video frames...
Definition: frame.h:368
This structure describes the bitrate properties of an encoded bitstream.
Definition: avcodec.h:1128
#define AV_LOG_INFO
Standard information.
Definition: log.h:187
NV_ENC_CONFIG encode_config
Definition: nvenc.h:127
static int nvenc_push_context(AVCodecContext *avctx)
Definition: nvenc.c:205
int av_image_fill_pointers(uint8_t *data[4], enum AVPixelFormat pix_fmt, int height, uint8_t *ptr, const int linesizes[4])
Fill plane data pointers for an image with pixel format pix_fmt and height height.
Definition: imgutils.c:111
int av_fifo_size(const AVFifoBuffer *f)
Return the amount of data in bytes in the AVFifoBuffer, that is the amount of data you can read from ...
Definition: fifo.c:77
int linesize[AV_NUM_DATA_POINTERS]
For video, size in bytes of each picture line.
Definition: frame.h:326
int strict_gop
Definition: nvenc.h:182
int temporal_aq
Definition: nvenc.h:179
int64_t initial_pts[2]
Definition: nvenc.h:157
main external API structure.
Definition: avcodec.h:1565
uint8_t * data
The data buffer.
Definition: buffer.h:89
int qmin
minimum quantizer
Definition: avcodec.h:2407
#define BD
int init_qp_i
Definition: nvenc.h:189
int extradata_size
Definition: avcodec.h:1667
#define AVERROR_BUG
Internal bug, also see AVERROR_BUG2.
Definition: error.h:50
This struct is allocated as AVHWDeviceContext.hwctx.
static int nvenc_check_cap(AVCodecContext *avctx, NV_ENC_CAPS cap)
Definition: nvenc.c:290
static void nvenc_codec_specific_pic_params(AVCodecContext *avctx, NV_ENC_PIC_PARAMS *params, NV_ENC_SEI_PAYLOAD *sei_data)
Definition: nvenc.c:1719
enum AVColorSpace colorspace
YUV colorspace type.
Definition: avcodec.h:2193
enum AVColorTransferCharacteristic color_trc
Color Transfer Characteristic.
Definition: avcodec.h:2186
int width
Definition: nvenc.h:62
This struct describes a set or pool of "hardware" frames (i.e.
Definition: hwcontext.h:123
#define IS_CBR(rc)
Definition: nvenc.c:38
AVPictureType
Definition: avutil.h:272
int flags
Definition: nvenc.c:592
int nonref_p
Definition: nvenc.h:181
float b_quant_offset
qscale offset between IP and B-frames
Definition: avcodec.h:1847
int cbr
Definition: nvenc.h:169
static int nvenc_find_free_reg_resource(AVCodecContext *avctx)
Definition: nvenc.c:1569
int averr
Definition: nvenc.c:67
static const struct @120 nvenc_errors[]
void av_frame_unref(AVFrame *frame)
Unreference all the buffers referenced by frame and reset the frame fields.
Definition: frame.c:553
int global_quality
Global quality for codecs which cannot change it per frame.
Definition: avcodec.h:1631
#define flags(name, subs,...)
Definition: cbs_av1.c:564
static void compute_dar(AVCodecContext *avctx, int *dw, int *dh)
Definition: nvenc.c:1113
uint8_t * data[AV_NUM_DATA_POINTERS]
pointer to the picture/channel planes.
Definition: frame.h:309
int reg_idx
Definition: nvenc.h:61
uint8_t level
Definition: svq3.c:207
#define AV_CODEC_FLAG_GLOBAL_HEADER
Place global headers in extradata instead of every keyframe.
Definition: avcodec.h:904
Hardware surfaces for Direct3D11.
Definition: pixfmt.h:313
int gop_size
the number of pictures in a group of pictures, or 0 for intra_only
Definition: avcodec.h:1760
const char const char * params
Definition: avisynth_c.h:867
int
int b_adapt
Definition: nvenc.h:178
static int64_t timestamp_queue_dequeue(AVFifoBuffer *queue)
Definition: nvenc.c:1756
planar YUV 4:2:0, 12bpp, (1 Cr & Cb sample per 2x2 Y samples)
Definition: pixfmt.h:66
#define FF_DISABLE_DEPRECATION_WARNINGS
Definition: internal.h:84
common internal api header.
int weighted_pred
Definition: nvenc.h:191
int rc_lookahead
Definition: nvenc.h:174
static int output_ready(AVCodecContext *avctx, int flush)
Definition: nvenc.c:1929
Bi-dir predicted.
Definition: avutil.h:276
planar YUV 4:4:4, 24bpp, full scale (JPEG), deprecated in favor of AV_PIX_FMT_YUV444P and setting col...
Definition: pixfmt.h:80
attribute_deprecated AVFrame * coded_frame
the picture in the bitstream
Definition: avcodec.h:2815
int size
Definition: nvenc.h:68
NvencSurface * surfaces
Definition: nvenc.h:133
int den
Denominator.
Definition: rational.h:60
#define AVERROR_UNKNOWN
Unknown error, typically from an external library.
Definition: error.h:71
NV_ENC_MAP_INPUT_RESOURCE in_map
Definition: nvenc.h:147
AVCPBProperties * ff_add_cpb_side_data(AVCodecContext *avctx)
Add a CPB properties side data to an encoding context.
Definition: utils.c:1973
#define AV_INPUT_BUFFER_PADDING_SIZE
Required number of additionally allocated bytes at the end of the input bitstream for decoding...
Definition: avcodec.h:790
static void reconfig_encoder(AVCodecContext *avctx, const AVFrame *frame)
Definition: nvenc.c:1947
#define FF_PROFILE_HEVC_REXT
Definition: avcodec.h:2989
void * priv_data
Definition: avcodec.h:1592
static int nvenc_set_timestamp(AVCodecContext *avctx, NV_ENC_LOCK_BITSTREAM *params, AVPacket *pkt)
Definition: nvenc.c:1765
#define xf(width, name, var, range_min, range_max, subs,...)
Definition: cbs_av1.c:667
#define av_free(p)
#define FF_ENABLE_DEPRECATION_WARNINGS
Definition: internal.h:85
AVFifoBuffer * av_fifo_alloc(unsigned int size)
Initialize an AVFifoBuffer.
Definition: fifo.c:43
int top_field_first
If the content is interlaced, is top field displayed first.
Definition: frame.h:447
static av_cold int nvenc_load_libraries(AVCodecContext *avctx)
Definition: nvenc.c:161
static av_cold int nvenc_check_device(AVCodecContext *avctx, int idx)
Definition: nvenc.c:411
int avg_bitrate
Average bitrate of the stream, in bits per second.
Definition: avcodec.h:1152
struct AVCodecInternal * internal
Private context used for internal data.
Definition: avcodec.h:1600
int device
Definition: nvenc.h:171
#define FF_QP2LAMBDA
factor to convert from H.263 QP to lambda
Definition: avutil.h:227
int64_t dts
Decompression timestamp in AVStream->time_base units; the time at which the packet is decompressed...
Definition: avcodec.h:1476
int ff_alloc_a53_sei(const AVFrame *frame, size_t prefix_len, void **data, size_t *sei_size)
Check AVFrame for A53 side data and allocate and fill SEI message with A53 info.
Definition: utils.c:2172
This struct is allocated as AVHWDeviceContext.hwctx.
int nb_surfaces
Definition: nvenc.h:132
int aud
Definition: nvenc.h:185
int cqp
Definition: nvenc.h:190
#define av_freep(p)
#define AV_CODEC_ID_H265
Definition: avcodec.h:393
void INT64 INT64 count
Definition: avisynth_c.h:766
static av_cold void set_lossless(AVCodecContext *avctx)
Definition: nvenc.c:721
void av_fifo_freep(AVFifoBuffer **f)
Free an AVFifoBuffer and reset pointer to NULL.
Definition: fifo.c:63
#define AV_LOG_FATAL
Something went wrong and recovery is not possible.
Definition: log.h:170
#define FFSWAP(type, a, b)
Definition: common.h:99
const char * av_get_pix_fmt_name(enum AVPixelFormat pix_fmt)
Return the short name for a pixel format, NULL in case pix_fmt is unknown.
Definition: pixdesc.c:2438
int tier
Definition: nvenc.h:167
int a53_cc
Definition: nvenc.h:194
void av_fifo_reset(AVFifoBuffer *f)
Reset the AVFifoBuffer to the state right after av_fifo_alloc, in particular it is emptied...
Definition: fifo.c:71
AVBufferRef * hw_device_ctx
A reference to the AVHWDeviceContext describing the device which will be used by a hardware encoder/d...
Definition: avcodec.h:3314
enum AVPixelFormat sw_format
The pixel format identifying the actual data layout of the hardware frames.
Definition: hwcontext.h:221
#define AVERROR_EXTERNAL
Generic error in an external library.
Definition: error.h:57
AVPixelFormat
Pixel format.
Definition: pixfmt.h:64
This structure stores compressed data.
Definition: avcodec.h:1454
NV_ENC_OUTPUT_PTR output_surface
Definition: nvenc.h:66
int64_t pts
Presentation timestamp in AVStream->time_base units; the time at which the decompressed packet will b...
Definition: avcodec.h:1470
for(j=16;j >0;--j)
#define AV_NOPTS_VALUE
Undefined timestamp value.
Definition: avutil.h:248
Predicted.
Definition: avutil.h:275
static void nvenc_map_preset(NvencContext *ctx)
Definition: nvenc.c:600
int zerolatency
Definition: nvenc.h:180
#define AV_PIX_FMT_0RGB32
Definition: pixfmt.h:364
int64_t rc_max_rate
maximum bitrate
Definition: avcodec.h:2443
void * av_mallocz_array(size_t nmemb, size_t size)
Allocate a memory block for an array with av_mallocz().
Definition: mem.c:191