Go to the documentation of this file. 21 #ifndef AVCODEC_MIPS_HEVC_MACROS_MSA_H 22 #define AVCODEC_MIPS_HEVC_MACROS_MSA_H 24 #define HEVC_PCK_SW_SB2(in0, in1, out) \ 28 tmp0_m = __msa_pckev_h((v8i16) in0, (v8i16) in1); \ 29 out = (v4i32) __msa_pckev_b((v16i8) tmp0_m, (v16i8) tmp0_m); \ 32 #define HEVC_PCK_SW_SB4(in0, in1, in2, in3, out) \ 34 v8i16 tmp0_m, tmp1_m; \ 36 PCKEV_H2_SH(in0, in1, in2, in3, tmp0_m, tmp1_m); \ 37 out = (v4i32) __msa_pckev_b((v16i8) tmp1_m, (v16i8) tmp0_m); \ 40 #define HEVC_PCK_SW_SB8(in0, in1, in2, in3, in4, in5, in6, in7, out0, out1) \ 42 v8i16 tmp0_m, tmp1_m, tmp2_m, tmp3_m; \ 44 PCKEV_H4_SH(in0, in1, in2, in3, in4, in5, in6, in7, \ 45 tmp0_m, tmp1_m, tmp2_m, tmp3_m); \ 46 PCKEV_B2_SW(tmp1_m, tmp0_m, tmp3_m, tmp2_m, out0, out1); \ 49 #define HEVC_PCK_SW_SB12(in0, in1, in2, in3, in4, in5, in6, in7, \ 50 in8, in9, in10, in11, out0, out1, out2) \ 52 v8i16 tmp0_m, tmp1_m, tmp2_m, tmp3_m, tmp4_m, tmp5_m; \ 54 PCKEV_H4_SH(in0, in1, in2, in3, in4, in5, in6, in7, \ 55 tmp0_m, tmp1_m, tmp2_m, tmp3_m); \ 56 PCKEV_H2_SH(in8, in9, in10, in11, tmp4_m, tmp5_m); \ 57 PCKEV_B2_SW(tmp1_m, tmp0_m, tmp3_m, tmp2_m, out0, out1); \ 58 out2 = (v4i32) __msa_pckev_b((v16i8) tmp5_m, (v16i8) tmp4_m); \ 61 #define HEVC_FILT_8TAP_SH(in0, in1, in2, in3, \ 62 filt0, filt1, filt2, filt3) \ 66 out_m = __msa_dotp_s_h((v16i8) in0, (v16i8) filt0); \ 67 out_m = __msa_dpadd_s_h(out_m, (v16i8) in1, (v16i8) filt1); \ 68 DPADD_SB2_SH(in2, in3, filt2, filt3, out_m, out_m); \ 72 #define HEVC_FILT_8TAP(in0, in1, in2, in3, \ 73 filt0, filt1, filt2, filt3) \ 77 out_m = __msa_dotp_s_w((v8i16) in0, (v8i16) filt0); \ 78 out_m = __msa_dpadd_s_w(out_m, (v8i16) in1, (v8i16) filt1); \ 79 DPADD_SH2_SW(in2, in3, filt2, filt3, out_m, out_m); \ 83 #define HEVC_FILT_4TAP(in0, in1, filt0, filt1) \ 87 out_m = __msa_dotp_s_w(in0, (v8i16) filt0); \ 88 out_m = __msa_dpadd_s_w(out_m, in1, (v8i16) filt1); \