[ Maybe insert picture of schematic as well ]
v 19991011
C 38700 58100 1 0 0 7400-1.sym
{
T 39000 59000 5 10 1 1 0
uref=U100
T 38900 59500 5 10 1 1 0
net=GND:7
T 38900 59300 5 10 1 1 0
net=+5V:14
}
N 38700 58800 37400 58800 4
{
T 37600 58900 5 10 1 1 0
netname=NETLABEL
}
N 37400 58800 37400 59200 4
N 38700 58400 37400 58400 4
N 37400 58000 37400 58400 4
C 37300 57700 1 0 0 gnd-1.sym
C 37200 59200 1 0 0 vcc-1.sym
{
T 36800 59200 5 10 1 1 0
net=+5V:1
}
N 40000 58600 41600 58600 4
{
T 41200 58700 5 10 1 1 0
netname=OUTPUT
}
C 40700 58800 1 90 0 resistor-1.sym
{
T 40800 59200 5 10 1 1 0
uref=R1
}
N 40600 58800 40600 58600 4
N 40600 59900 40600 59700 4
C 40400 59900 1 0 0 5V-plus-1.sym
gnetlist (using the geda netlist format) run using this sample schematic outputs this:
START header gEDA's netlist format Created specifically for testing of gnetlist END header START components R1 device=RESISTOR U100 device=7400 END components START renamed-nets NETLABEL -> +5V END renamed-nets START nets +5V : R1 2, U100 14, U100 1 GND : U100 7, U100 2 OUTPUT : R1 1, U100 3 END netsNotice how NETLABEL was renamed (aliased to the +5V net).